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Message-ID: <Y+FtutYjJFlrFtvP@sirena.org.uk>
Date: Mon, 6 Feb 2023 21:14:34 +0000
From: Mark Brown <broonie@...nel.org>
To: Daniel Beer <daniel.beer@...rinstitute.com>
Cc: alsa-devel@...a-project.org, linux-kernel@...r.kernel.org,
Andy Liu <andy-liu@...com>
Subject: Re: [PATCH v3 2/2] ASoC: tas5805m: add missing page switch.
On Tue, Feb 07, 2023 at 09:45:46AM +1300, Daniel Beer wrote:
> We did discuss this a while back when the driver first went in.
> Unfortunately the vendor software tools provide configuration for the
> part in the form of a sequence of raw register writes, including
> explicit page changes:
> https://lore.kernel.org/lkml/Yd85bjKEX9JnoOlI@sirena.org.uk/
That seems surmountable, either bypassing regmap or parsing the
configuration files.
> Aside from this, I have two other practical issues.
> The first is that I'm not sure how exactly to implement the paging
> scheme in terms of regmap_range_cfg (assuming this is what you're
> referring to). This chip has multi-level paging (books/pages), with the
> book selection register itself requiring paging to access. A sequence of
That's absolutely fine, this isn't the first device which has such a
setup and the code handles nested windows fine.
> Secondly, the patches as submitted here have been tested, but I don't
> currently have access to hardware. I'm very hesitant to make a
> significant change without retesting and leave the driver in a broken
> state again.
Presumably someone does given that the problem was noticed?
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