lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 7 Feb 2023 09:45:44 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Chen-Yu Tsai <wenst@...omium.org>
Cc:     mturquette@...libre.com, sboyd@...nel.org, matthias.bgg@...il.com,
        johnson.wang@...iatek.com, miles.chen@...iatek.com,
        chun-jie.chen@...iatek.com, daniel@...rotopia.org,
        fparent@...libre.com, msp@...libre.com, nfraprado@...labora.com,
        rex-bc.chen@...iatek.com, zhaojh329@...il.com,
        sam.shih@...iatek.com, edward-jw.yang@...iatek.com,
        yangyingliang@...wei.com, granquet@...libre.com,
        pablo.sun@...iatek.com, sean.wang@...iatek.com,
        chen.zhong@...iatek.com, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v1 05/45] clk: mediatek: mt2712: Migrate topckgen/mcucfg
 to mtk_clk_simple_probe()

Il 07/02/23 07:15, Chen-Yu Tsai ha scritto:
> On Mon, Feb 6, 2023 at 11:29 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@...labora.com> wrote:
>>
>> Now that the common mtk_clk_simple_{probe,remove}() functions can deal
>> with divider clocks it is possible to migrate more clock drivers to it:
>> in this case, it's about topckgen.
>> While at it, also perform a fast migration for mcucfg.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> 
> Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
> 
>> ---
>>   drivers/clk/mediatek/clk-mt2712.c | 127 +++++-------------------------
>>   1 file changed, 21 insertions(+), 106 deletions(-)
>>

..snip..
                      __func__, r);
>> +static const struct mtk_clk_desc topck_desc = {
>> +       .clks = top_clks,
>> +       .num_clks = ARRAY_SIZE(top_clks),
>> +       .fixed_clks = top_fixed_clks,
>> +       .num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
>> +       .factor_clks = top_divs,
>> +       .num_factor_clks = ARRAY_SIZE(top_divs),
>> +       .composite_clks = top_muxes,
>> +       .num_composite_clks = ARRAY_SIZE(top_muxes),
>> +       .divider_clks = top_adj_divs,
>> +       .num_divider_clks = ARRAY_SIZE(top_adj_divs),
>> +       .clk_lock = &mt2712_clk_lock,
> 
> At some point maybe we should look into splitting up the locks to one
> per block, or converting everything to regmap.
> 

I was thinking the same about the locks... but about regmap, that would
actually add up some overhead at every R/W operation and I would really
like to measure that precisely before doing any kind of regmap conversion
for the MediaTek clocks.

Perhaps I'll even find a way to avoid any kind of (even if small) overhead
while doing that sometime in the future, which wouldn't be benefitting only
MediaTek, but also other users like Qualcomm (as they have practically all
clocks on regmap!).

Cheers,
Angelo


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ