linux-kernel - Re: [PATCH v4 7/8] arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes

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Message-ID: <Y+Iy9/82q9eWMMbn@hovoldconsulting.com>
Date:   Tue, 7 Feb 2023 12:16:07 +0100
From:   Johan Hovold <johan@...nel.org>
To:     Abel Vesa <abel.vesa@...aro.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        devicetree@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 7/8] arm64: dts: qcom: sm8550: Add USB PHYs and
 controller nodes

On Tue, Feb 07, 2023 at 01:03:26PM +0200, Abel Vesa wrote:
> On 23-02-03 11:55:11, Johan Hovold wrote:
> > On Thu, Feb 02, 2023 at 03:25:10PM +0200, Abel Vesa wrote:
> > > Add USB host controller and PHY nodes.
> > > 
> > > Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> > > ---
> > > 
> > > Changes since v3:
> > >  * none
> > > 
> > > Changes since v2:
> > >  * none
> > > 
> > > NOTE: This patch has been already merged. It is here only to provide
> > > context for the rest of the patchset. There is a change with respect to
> > > the clocks, but that will be sent as a separate/individual fix patch.
> > 
> > I believe it was because of the 'phy' and 'common' resets, which have
> > been switched below.
> 
> No, the resets haven't been switched, at least not compared to the
> already merged version.

The resets were wrong in the merged version just as they are below. I've
already sent a fix here:

	https://lore.kernel.org/lkml/20230123101607.2413-1-johan+linaro@kernel.org/
 
> > > +		usb_dp_qmpphy: phy@...8000 {
> > > +			compatible = "qcom,sm8550-qmp-usb3-dp-phy";
> > > +			reg = <0x0 0x088e8000 0x0 0x3000>;
> > > +
> > > +			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> > > +				 <&rpmhcc RPMH_CXO_CLK>,
> > > +				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> > > +				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> > > +			clock-names = "aux", "ref", "com_aux", "usb3_pipe";
> > > +
> > > +			power-domains = <&gcc USB3_PHY_GDSC>;
> > > +
> > > +			resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
> > > +				 <&gcc GCC_USB3_PHY_PRIM_BCR>;
> > > +			reset-names = "phy", "common";

Johan