linux-kernel - [PATCH V3 2/5] arm64: dts: qcom: Add support for Crashdump collection on IPQ9574

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 8 Feb 2023 11:03:29 +0530
From:   Poovendhan Selvaraj <quic_poovendh@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <lee@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>,
        <jassisinghbrar@...il.com>, <catalin.marinas@....com>,
        <will@...nel.org>, <shawnguo@...nel.org>, <arnd@...db.de>,
        <marcel.ziswiler@...adex.com>, <robimarko@...il.com>,
        <dmitry.baryshkov@...aro.org>, <nfraprado@...labora.com>,
        <broonie@...nel.org>, <quic_gurus@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <quic_srichara@...cinc.com>, <quic_gokulsri@...cinc.com>,
        <quic_sjaganat@...cinc.com>, <quic_kathirav@...cinc.com>,
        <quic_arajkuma@...cinc.com>, <quic_anusha@...cinc.com>,
        <quic_devipriy@...cinc.com>
Subject: [PATCH V3 2/5] arm64: dts: qcom: Add support for Crashdump collection on IPQ9574

Enable Crashdump collection in ipq9574

Co-developed-by: Anusha Rao <quic_anusha@...cinc.com>
Signed-off-by: Anusha Rao <quic_anusha@...cinc.com>
Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@...cinc.com>
---
 Changes in V3:
	- No changes
 arch/arm64/boot/dts/qcom/ipq9574.dtsi | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 2b86ba17bb32..9c4523f50a57 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -81,6 +81,13 @@
 		reg = <0x0 0x40000000 0x0 0x0>;
 	};
 
+	firmware {
+		scm {
+			compatible = "qcom,scm-ipq9574", "qcom,scm";
+			qcom,dload-mode = <&tcsr_boot_misc 0>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a73-pmu";
 		interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -95,11 +102,17 @@
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;
-
 		tz_region: tz@...00000 {
 			reg = <0x0 0x4a600000 0x0 0x400000>;
 			no-map;
 		};
+
+		smem@...00000 {
+			compatible = "qcom,smem";
+			reg = <0x0 0x4aa00000 0x0 0x00100000>;
+			hwlocks = <&tcsr_mutex 0>;
+			no-map;
+		};
 	};
 
 	soc: soc@0 {
@@ -150,6 +163,17 @@
 			#power-domain-cells = <1>;
 		};
 
+		tcsr_mutex: hwlock@...5000 {
+			compatible = "qcom,tcsr-mutex";
+			reg = <0x01905000 0x8000>;
+			#hwlock-cells = <1>;
+		};
+
+		tcsr_boot_misc: syscon@...d100 {
+			ompatible = "qcom,tcsr-ipq9574", "syscon";
+			reg = <0x0193d100 0x4>;
+		};
+
 		sdhc_1: mmc@...4000 {
 			compatible = "qcom,ipq9574-sdhci", "qcom,sdhci-msm-v5";
 			reg = <0x07804000 0x1000>, <0x07805000 0x1000>;
-- 
2.17.1