linux-kernel - Re: [PATCH V6 24/24] mmc: sdhci-pci-gli: enable UHS-II mode for GL9755

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Message-ID: <CAPDyKFojDjsjAstdLFdM5E1ZJVBaLO1DT0FXBcVo0nWBm=B0aw@mail.gmail.com>
Date:   Wed, 8 Feb 2023 12:35:04 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Victor Shih <victorshihgli@...il.com>
Cc:     adrian.hunter@...el.com, linux-mmc@...r.kernel.org,
        linux-kernel@...r.kernel.org, benchuanggli@...il.com,
        HL.Liu@...esyslogic.com.tw, Greg.tu@...esyslogic.com.tw,
        takahiro.akashi@...aro.org, dlunev@...omium.org,
        Victor Shih <victor.shih@...esyslogic.com.tw>,
        Ben Chuang <ben.chuang@...esyslogic.com.tw>
Subject: Re: [PATCH V6 24/24] mmc: sdhci-pci-gli: enable UHS-II mode for GL9755

On Tue, 13 Dec 2022 at 10:02, Victor Shih <victorshihgli@...il.com> wrote:
>
> Changes are:
> * Disable GL9755 overcurrent interrupt when power on/off on UHS-II.
> * Enable the internal clock when do reset on UHS-II mode.
> * Set ZC to 0x0 for Sandisk cards and set ZC to 0xB for others.
> * Increase timeout value before detecting UHS-II interface.
> * Add vendor settings fro UHS-II mode.
>
> Signed-off-by: Ben Chuang <ben.chuang@...esyslogic.com.tw>
> Signed-off-by: AKASHI Takahiro <takahiro.akashi@...aro.org>
> Signed-off-by: Victor Shih <victor.shih@...esyslogic.com.tw>
> ---
>  drivers/mmc/host/Kconfig         |   1 +
>  drivers/mmc/host/sdhci-pci-gli.c | 309 ++++++++++++++++++++++++++++++-
>  2 files changed, 309 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 9c22370fb778..e68cdcb72cba 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -111,6 +111,7 @@ config MMC_SDHCI_PCI
>         tristate "SDHCI support on PCI bus"
>         depends on MMC_SDHCI && PCI
>         select MMC_CQHCI
> +       select MMC_SDHCI_UHS2
>         select IOSF_MBI if X86
>         select MMC_SDHCI_IO_ACCESSORS
>         help
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c

[...]

> +static void gl9755_post_attach_sd(struct sdhci_host *host)
> +{
> +       struct pci_dev *pdev;
> +       struct sdhci_pci_chip *chip;
> +       struct sdhci_pci_slot *slot;
> +       u32 serdes;
> +
> +       slot = sdhci_priv(host);
> +       chip = slot->chip;
> +       pdev = chip->pdev;
> +
> +       gl9755_wt_on(pdev);
> +
> +       pci_read_config_dword(pdev, PCI_GLI_9755_SerDes, &serdes);
> +       serdes &= ~PCI_GLI_9755_UHS2_SERDES_ZC1;
> +       serdes &= ~PCI_GLI_9755_UHS2_SERDES_ZC2;
> +       serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_ZC1,
> +                            GLI_9755_UHS2_SERDES_ZC1_VALUE);
> +
> +       /* the manfid of sandisk card is 0x3 */
> +       if (host->mmc->card->cid.manfid == 0x3)
> +               serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_ZC2,
> +                                    GLI_9755_UHS2_SERDES_ZC2_SANDISK);
> +       else
> +               serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_ZC2,
> +                                    GLI_9755_UHS2_SERDES_ZC2_DEFAULT);
> +
> +       pci_write_config_dword(pdev, PCI_GLI_9755_SerDes, serdes);

Can you please clarify what kind of configuration you are doing here -
and in particular why it's based upon the card's manfid?

[...]

Kind regards
Uffe