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Message-ID: <Y+OJaGY6mcxM0JOF@orome>
Date: Wed, 8 Feb 2023 12:37:12 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Manikanta Maddireddy <mmaddireddy@...dia.com>
Cc: bhelgaas@...gle.com, petlozup@...dia.com,
rafael.j.wysocki@...el.com, lpieralisi@...nel.org, robh@...nel.org,
jeffy.chen@...k-chips.com, krzysztof.kozlowski+dt@...aro.org,
jonathanh@...dia.com, dmitry.osipenko@...labora.com,
viresh.kumar@...aro.org, gregkh@...uxfoundation.org,
steven.price@....com, kw@...ux.com, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-pm@...r.kernel.org,
vidyas@...dia.com
Subject: Re: [RFC,v14 4/5] arm64: tegra: Add PCIe port node with PCIe WAKE#
for C1 controller
On Wed, Feb 08, 2023 at 04:46:44PM +0530, Manikanta Maddireddy wrote:
> Add PCIe port node under the PCIe controller-1 device tree node to support
> PCIe WAKE# interrupt for WiFi.
>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@...dia.com>
> ---
>
> Changes in v14:
> New patch in the series to support PCIe WAKE# in NVIDIA Jetson AGX Orin.
>
> .../dts/nvidia/tegra234-p3737-0000+p3701-0000.dts | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
> index 8a9747855d6b..9c89be263141 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
> @@ -2147,6 +2147,17 @@ pcie@...00000 {
>
> phys = <&p2u_hsio_3>;
> phy-names = "p2u-0";
> +
> + pci@0,0 {
> + reg = <0x0000 0 0 0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> +
> + interrupt-parent = <&gpio>;
> + interrupts = <TEGRA234_MAIN_GPIO(L, 2) IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "wakeup";
> + };
Don't we need to wire this to the PMC interrupt controller and the wake
event corresponding to the L2 GPIO? Otherwise none of the wake logic in
PMC will get invoked.
Thierry
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