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Message-ID: <Y+OnUXkKcT2Y7Yiq@localhost>
Date: Wed, 8 Feb 2023 13:44:49 +0000
From: Hyeonggon Yoo <42.hyeyoo@...il.com>
To: Peter Zijlstra <peterz@...radead.org>
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Subject: Re: [PATCH v2 09/10] arch: Remove cmpxchg_double
On Thu, Feb 02, 2023 at 03:50:39PM +0100, Peter Zijlstra wrote:
> No moar users, remove the monster.
>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> ---
> Documentation/core-api/this_cpu_ops.rst | 2 -
> arch/arm64/include/asm/atomic_ll_sc.h | 33 ----------------
> arch/arm64/include/asm/atomic_lse.h | 36 ------------------
> arch/arm64/include/asm/cmpxchg.h | 46 -----------------------
> arch/arm64/include/asm/percpu.h | 10 -----
> arch/s390/include/asm/cmpxchg.h | 34 -----------------
> arch/s390/include/asm/percpu.h | 18 ---------
> arch/x86/include/asm/cmpxchg.h | 25 ------------
> arch/x86/include/asm/cmpxchg_32.h | 1
> arch/x86/include/asm/cmpxchg_64.h | 1
> arch/x86/include/asm/percpu.h | 41 --------------------
> include/asm-generic/percpu.h | 58 -----------------------------
> include/linux/atomic/atomic-instrumented.h | 17 --------
> include/linux/percpu-defs.h | 38 -------------------
> scripts/atomic/gen-atomic-instrumented.sh | 17 ++------
> 15 files changed, 6 insertions(+), 371 deletions(-)
>
> --- a/arch/x86/include/asm/cmpxchg.h
> +++ b/arch/x86/include/asm/cmpxchg.h
> --- a/arch/x86/include/asm/percpu.h
> +++ b/arch/x86/include/asm/percpu.h
> @@ -385,30 +368,6 @@ do { \
> #define this_cpu_add_return_8(pcp, val) percpu_add_return_op(8, volatile, pcp, val)
> #define this_cpu_xchg_8(pcp, nval) percpu_xchg_op(8, volatile, pcp, nval)
> #define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, volatile, pcp, oval, nval)
> -
> -/*
> - * Pretty complex macro to generate cmpxchg16 instruction. The instruction
> - * is not supported on early AMD64 processors so we must be able to emulate
> - * it in software. The address used in the cmpxchg16 instruction must be
> - * aligned to a 16 byte boundary.
> - */
> -#define percpu_cmpxchg16b_double(pcp1, pcp2, o1, o2, n1, n2) \
> -({ \
> - bool __ret; \
> - typeof(pcp1) __o1 = (o1), __n1 = (n1); \
> - typeof(pcp2) __o2 = (o2), __n2 = (n2); \
> - alternative_io("leaq %P1,%%rsi\n\tcall this_cpu_cmpxchg16b_emu\n\t", \
I guess now arch/x86/lib/cmpxchg*b_emu.S could be dropped too?
> - "cmpxchg16b " __percpu_arg(1) "\n\tsetz %0\n\t", \
> - X86_FEATURE_CX16, \
> - ASM_OUTPUT2("=a" (__ret), "+m" (pcp1), \
> - "+m" (pcp2), "+d" (__o2)), \
> - "b" (__n1), "c" (__n2), "a" (__o1) : "rsi"); \
> - __ret; \
> -})
> -
> -#define raw_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
> -#define this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
> -
> #endif
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