lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <6edc8fcd-d6d3-916d-c2f4-a44b8485ab77@linaro.org>
Date:   Thu, 9 Feb 2023 16:50:49 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Ryan.Wanner@...rochip.com, ludovic.desroches@...rochip.com,
        linus.walleij@...aro.org, nicolas.ferre@...rochip.com,
        alexandre.belloni@...tlin.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, claudiu.beznea@...rochip.com
Cc:     linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        manikandan.M@...rochip.com
Subject: Re: [PATCH 2/2] pinctrl: at91: adding new macros

On 09/02/2023 16:45, Ryan.Wanner@...rochip.com wrote:
> From: Ryan Wanner <Ryan.Wanner@...rochip.com>

Use subject prefixes matching the subsystem (which you can get for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching).

> 
> Adding macros for sama7g drive strength.
> 
> Signed-off-by: Ryan Wanner <Ryan.Wanner@...rochip.com>
> ---
>  include/dt-bindings/pinctrl/at91.h | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
> index e8e117306b1b..fd0a389b2a0f 100644
> --- a/include/dt-bindings/pinctrl/at91.h
> +++ b/include/dt-bindings/pinctrl/at91.h
> @@ -42,8 +42,14 @@
>  #define AT91_PERIPH_C		3
>  #define AT91_PERIPH_D		4
>  
> -#define ATMEL_PIO_DRVSTR_LO	1

That's an ABI break, so no. You need to keep it.

> +#define ATMEL_PIO_DRVSTR_LO_0	0
> +#define ATMEL_PIO_DRVSTR_LO_1	1
>  #define ATMEL_PIO_DRVSTR_ME	2
>  #define ATMEL_PIO_DRVSTR_HI	3
>  
> +#define ATMEL_PIO_DRVSTR_LO_D 0
> +#define ATMEL_PIO_DRVSTR_HI_A 1
> +#define ATMEL_PIO_DRVSTR_LO_C 2
> +#define ATMEL_PIO_DRVSTR_LO_B 3

Explanation for all of these would be useful, it's a bit of cryptic.


Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ