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Message-ID: <Y+U5d7dpKceXkh6f@L14.lan>
Date:   Thu, 9 Feb 2023 19:20:39 +0100
From:   Henrik Grimler <henrik@...mler.se>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Marek Szyprowski <m.szyprowski@...sung.com>, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, alim.akhtar@...sung.com,
        jenneron@...tonmail.com, markuss.broks@...il.com,
        martin.juecker@...il.com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
        Valentine Iourine <iourine@...rine.msk.su>
Subject: Re: [PATCH v2 2/2] ARM: dts: exynos: add mmc aliases

On Thu, Feb 09, 2023 at 04:18:33PM +0100, Krzysztof Kozlowski wrote:
> On 09/02/2023 15:50, Marek Szyprowski wrote:
> > On 09.02.2023 15:23, Krzysztof Kozlowski wrote:
> >> On 28/01/2023 14:31, Henrik Grimler wrote:
> >>> Add aliases for eMMC, SD card and WiFi where applicable, so that
> >>> assigned mmcblk numbers are always the same.

[ ... ]

> >>> +	aliases {
> >>> +		mmc0 = &sdhci_0;
> >>> +		mmc2 = &sdhci_2;
> >>> +		mmc3 = &sdhci_3;
> >> 1. Is this actually correct? Since mmc1 was disabled, sdhci_2 had mmc1
> >> index but now will have mmc2.
> >>
> >> 2. I tested Odroid U3 and the ID changed. emmc went from 1 to 0. Any
> >> idea why? Both patches should be transparent.
> > 
> > Nope, eMMC and SD order changed a few times in the past and now they get 
> > indices based on the probe time, so any order is possible depending on 
> > the presence of the sd card / eMMC module.
> > 
> >> 3. Patchset does not look bisectable, so both patches should be squashed.
> > 
> > Why? First patch removes obsolete mshc aliases, which don't determine 
> > the logical MMC device number in the system. The second one adds fixed 
> > indices to the local MMC devices created by the respective MMC host 
> > controllers.
> 
> Ah, I see now, so mshc only determined the caps. That makes sense and
> answers my two questions.
> 
> But my question (1) a bit remains - these numbers of aliases should
> reflect what is wired on the board, so:
> A. before indices were mmc0, mmc1, mmc2 (and sdhcio_1 disabled). Now
> indices will be mmc0, mmc2 and mmc3, right?

Yes (and before indices could change between reboots).

> B. How the interface is called on the board? For some boards we actually
> can check with schematics.

Based on the limited public information like user manuals ([1] and
[2]) I *think* the internal storage, sdhci_0 and mshc_0 on 4210 and
4412 (respectively), is connected to data lines belonging to both
SDMMC0 and SDMMC1 (4+4 data lines, SDMMC# is what the IP is called in
user manuals), since they have a bus-width of 8.  The sdcard reader
however has a bus-width of 4 and is connected to just SDMMC2 on both.

So, I think suggested aliases best describe the hardware.  Maybe Marek
or someone else at Samsung has a better understanding of these boards
though :)

> Best regards,
> Krzysztof

[1] https://web.archive.org/web/20170918162018/http://www.samsung.com/global/business/semiconductor/file/product/Pulbicmanual_Exynos_4_Dual_45nm_Ver00-2.pdf
[2] https://github.com/lian494362816/Tiny4412/blob/master/Pdf/Exynos%204412%20SCP_Users%20Manual_Ver.0.10.00_Preliminary0.pdf

Best regards,
Henrik Grimler

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