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Message-ID: <CAE-0n51Ov_0p0JW=4M6NsVzoKUBGaZDKAJtm+wHMMLMiNpDE1Q@mail.gmail.com>
Date:   Thu, 9 Feb 2023 18:02:36 -0500
From:   Stephen Boyd <swboyd@...omium.org>
To:     Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>,
        agross@...nel.org, alsa-devel@...a-project.org,
        andersson@...nel.org, broonie@...nel.org,
        devicetree@...r.kernel.org, dianders@...omium.org,
        judyhsiao@...omium.org, konrad.dybcio@...ainline.org,
        krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, mka@...omium.org,
        quic_mohs@...cinc.com, quic_rjendra@...cinc.com,
        quic_rohkumar@...cinc.com, robh+dt@...nel.org,
        srinivas.kandagatla@...aro.org, vkoul@...nel.org
Subject: Re: [PATCH v5 5/8] arm64: dts: qcom: sc7280: Update lpass_tlmm node

Quoting Srinivasa Rao Mandadapu (2023-02-06 08:16:38)
> Update lpass_tlmm clock properties, as different clock sources
> are required in ADSP enabled platforms.
> Also update LPASS_MCC register region. This is required to avoid
> memory region conflicts due to overlapping lpass_efuse Q6 regmap
> region used in LPASS PIL node.

If efuse is overlapping, why isn't that made into an nvmem device that
can be used or not used depending on the configuration?

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