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Message-ID: <CAGuA+oqXmSDbNO1NWDHZ8-KGhF3mwzqwY6wWx2zUhwL7yfynQA@mail.gmail.com>
Date:   Fri, 10 Feb 2023 10:08:40 +0100
From:   Balsam CHIHI <bchihi@...libre.com>
To:     Matthias Brugger <matthias.bgg@...il.com>
Cc:     daniel.lezcano@...aro.org, angelogioacchino.delregno@...labora.com,
        rafael@...nel.org, amitk@...nel.org, rui.zhang@...el.com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        rdunlap@...radead.org, ye.xingchen@....com.cn,
        p.zabel@...gutronix.de, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        khilman@...libre.com, james.lo@...iatek.com,
        rex-bc.chen@...iatek.com
Subject: Re: [PATCH v14 3/6] arm64: dts: mt8195: Add efuse node to mt8195

Hi Matthias,

On Thu, Feb 9, 2023 at 5:28 PM Matthias Brugger <matthias.bgg@...il.com> wrote:
>
>
>
> On 09/02/2023 11:56, bchihi@...libre.com wrote:
> > From: Balsam CHIHI <bchihi@...libre.com>
> >
> > Add efuse node.
> > This will be required by the thermal driver to get the calibration data.
> >
> > Signed-off-by: Balsam CHIHI <bchihi@...libre.com>
> > Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> > Link: https://lore.kernel.org/r/20230124131717.128660-4-bchihi@baylibre.com
> > Signed-off-by: Matthias Brugger <matthias.bgg@...il.com>
>
> This patch is already accepted [1], please drop it from your list.

Yes sure. I will.
Thank you.

>
> Regards,
> Matthias
>
> [1] https://lore.kernel.org/lkml/104bb37e-55c3-8dd0-f501-0e8a142511e6@gmail.com/
>
> > ---
> >   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 6 ++++++
> >   1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > index 5d31536f4c486..09df105f4606d 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > @@ -1380,6 +1380,12 @@ pciephy_glb_intr: pciephy-glb-intr@193 {
> >                       dp_calibration: dp-data@1ac {
> >                               reg = <0x1ac 0x10>;
> >                       };
> > +                     lvts_efuse_data1: lvts1-calib@1bc {
> > +                             reg = <0x1bc 0x14>;
> > +                     };
> > +                     lvts_efuse_data2: lvts2-calib@1d0 {
> > +                             reg = <0x1d0 0x38>;
> > +                     };
> >               };
> >
> >               u3phy2: t-phy@...40000 {

Best regards,
Balsam

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