lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Fri, 10 Feb 2023 03:59:51 +0300 From: Serge Semin <fancer.lancer@...il.com> To: Vinod Koul <vkoul@...nel.org> Cc: Cai Huoqing <cai.huoqing@...ux.dev>, caihuoqing <caihuoqing@...du.com>, Gustavo Pimentel <gustavo.pimentel@...opsys.com>, linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org Subject: Re: [PATCH 0/3] dmaengine: dw-edma: Add support for native HDMA Hi Vinod On Wed, Sep 21, 2022 at 02:48:49PM +0800, Cai Huoqing wrote: > From: caihuoqing <caihuoqing@...du.com> > > Add support for HDMA NATIVE, as long the IP design has set > the compatible register map parameter-HDMA_NATIVE, > which allows compatibility for native HDMA register configuration. > > The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP. > And the native HDMA registers are different from eDMA, > so this patch add support for HDMA NATIVE mode. > > HDMA write and read channels operate independently to maximize > the performance of the HDMA read and write data transfer over > the link When you configure the HDMA with multiple read channels, > then it uses a round robin (RR) arbitration scheme to select > the next read channel to be serviced. > The same applies when you have multiple write channels. > > The native HDMA driver also supports a maximum of 16 independent > channels (8 write + 8 read), which can run simultaneously. > Both SAR (Source Address Register) and DAR (Destination Address Register) > are alignmented to byte.dmaengine: dw-edma: Add support for native HDMA > > These series based on the series > https://lore.kernel.org/dmaengine/20220822185332.26149-1-Sergey.Semin@baikalelectronics.ru/ Please note this patchset is a refactored version of the patch submitted by Cai a while ago https://lore.kernel.org/dmaengine/20220824140146.29140-1-cai.huoqing@linux.dev/ The main design aspects implemented here were discussed in the framework of that thread. -Serge(y) > > Cai Huoqing (3): > dmaengine: dw-edma: Rename dw_edma_core_ops structure to > dw_edma_plat_ops > dmaengine: dw-edma: Create a new dw_edma_core_ops structure to > abstract controller operation > dmaengine: dw-edma: Add support for native HDMA > > drivers/dma/dw-edma/Makefile | 6 +- > drivers/dma/dw-edma/dw-edma-core.c | 65 ++--- > drivers/dma/dw-edma/dw-edma-core.h | 19 ++ > drivers/dma/dw-edma/dw-edma-pcie.c | 4 +- > drivers/dma/dw-edma/dw-edma-v0-core.c | 90 ++++++- > drivers/dma/dw-edma/dw-edma-v0-core.h | 14 +- > drivers/dma/dw-edma/dw-hdma-v0-core.c | 304 +++++++++++++++++++++++ > drivers/dma/dw-edma/dw-hdma-v0-core.h | 17 ++ > drivers/dma/dw-edma/dw-hdma-v0-debugfs.c | 150 +++++++++++ > drivers/dma/dw-edma/dw-hdma-v0-debugfs.h | 22 ++ > drivers/dma/dw-edma/dw-hdma-v0-regs.h | 98 ++++++++ > include/linux/dma/edma.h | 7 +- > 12 files changed, 725 insertions(+), 71 deletions(-) > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h > > -- > 2.25.1 >
Powered by blists - more mailing lists