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Message-Id: <20230211064006.14981-3-semen.protsenko@linaro.org>
Date: Sat, 11 Feb 2023 00:40:02 -0600
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Chanwoo Choi <cw00.choi@...sung.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Rob Herring <robh+dt@...nel.org>
Cc: David Virag <virag.david003@...il.com>,
Chanho Park <chanho61.park@...sung.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Sumit Semwal <sumit.semwal@...aro.org>,
Tomasz Figa <tomasz.figa@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 2/6] dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
Add main gate clocks for controlling AUD and HSI CMUs:
- gout_aud_cmu_aud_pclk
- gout_hsi_cmu_hsi_pclk
While at it, add missing PPMU (Performance Profiling Monitor Unit)
clocks for CMU_HSI.
Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
---
include/dt-bindings/clock/exynos850.h | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h
index 8bb62e43fd60..afacba338c91 100644
--- a/include/dt-bindings/clock/exynos850.h
+++ b/include/dt-bindings/clock/exynos850.h
@@ -178,7 +178,8 @@
#define IOCLK_AUDIOCDCLK5 58
#define IOCLK_AUDIOCDCLK6 59
#define TICK_USB 60
-#define AUD_NR_CLK 61
+#define CLK_GOUT_AUD_CMU_AUD_PCLK 61
+#define AUD_NR_CLK 62
/* CMU_CMGP */
#define CLK_RCO_CMGP 1
@@ -227,7 +228,10 @@
#define CLK_GOUT_MMC_CARD_ACLK 11
#define CLK_GOUT_MMC_CARD_SDCLKIN 12
#define CLK_GOUT_SYSREG_HSI_PCLK 13
-#define HSI_NR_CLK 14
+#define CLK_GOUT_HSI_PPMU_ACLK 14
+#define CLK_GOUT_HSI_PPMU_PCLK 15
+#define CLK_GOUT_HSI_CMU_HSI_PCLK 16
+#define HSI_NR_CLK 17
/* CMU_IS */
#define CLK_MOUT_IS_BUS_USER 1
--
2.39.1
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