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Message-ID: <167610970497.4906.9484310857519512123.tip-bot2@tip-bot2>
Date:   Sat, 11 Feb 2023 10:01:44 -0000
From:   "tip-bot2 for Borislav Petkov (AMD)" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Jiapeng Chong <jiapeng.chong@...ux.alibaba.com>,
        "Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: [tip: x86/cleanups] x86/cacheinfo: Remove unused trace variable

The following commit has been merged into the x86/cleanups branch of tip:

Commit-ID:     851026a2bf54e739a2e13723bf3c4513f3cbcdc9
Gitweb:        https://git.kernel.org/tip/851026a2bf54e739a2e13723bf3c4513f3cbcdc9
Author:        Borislav Petkov (AMD) <bp@...en8.de>
AuthorDate:    Sat, 11 Feb 2023 00:45:41 +01:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Sat, 11 Feb 2023 10:43:31 +01:00

x86/cacheinfo: Remove unused trace variable

15cd8812ab2c ("x86: Remove the CPU cache size printk's") removed the
last use of the trace local var. Remove it too and the useless trace
cache case.

No functional changes.

Reported-by: Jiapeng Chong <jiapeng.chong@...ux.alibaba.com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/r/20230210234541.9694-1-bp@alien8.de
Link: http://lore.kernel.org/r/20220705073349.1512-1-jiapeng.chong@linux.alibaba.com
---
 arch/x86/kernel/cpu/cacheinfo.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index f4e5aa2..4063e89 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -734,7 +734,7 @@ void init_hygon_cacheinfo(struct cpuinfo_x86 *c)
 void init_intel_cacheinfo(struct cpuinfo_x86 *c)
 {
 	/* Cache sizes */
-	unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0;
+	unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0;
 	unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
 	unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
 	unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
@@ -835,9 +835,6 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c)
 						case LVL_3:
 							l3 += cache_table[k].size;
 							break;
-						case LVL_TRACE:
-							trace += cache_table[k].size;
-							break;
 						}
 
 						break;

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