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Message-ID: <20230213215845.GA1332049@hu-bjorande-lv.qualcomm.com>
Date:   Mon, 13 Feb 2023 13:58:45 -0800
From:   Bjorn Andersson <quic_bjorande@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>
CC:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce
 pmic_glink

On Mon, Feb 13, 2023 at 09:44:14PM +0100, Konrad Dybcio wrote:
> 
> 
> On 13.02.2023 17:28, Bjorn Andersson wrote:
> > From: Bjorn Andersson <bjorn.andersson@...aro.org>
> > 
> > The SC8280XP CRD control over battery management and its two USB Type-C
> > port using pmic_glink and two GPIO-based SBU muxes.
> > 
> > Enable the two DisplayPort instances, GPIO SBU mux instance and
> > pmic_glink with the two connectors on the CRD.
> > 
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> > Signed-off-by: Bjorn Andersson <quic_bjorande@...cinc.com>
> > ---
> > 
> [...]
> 
> > +&mdss0_dp0 {
> > +	data-lanes = <0 1>;
> > +	status = "okay";
> > +
> > +	ports {
> > +		port@1 {
> > +			reg = <1>;
> > +
> > +			mdss0_dp0_out: endpoint {
> > +				remote-endpoint = <&pmic_glink_con0_ss>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&mdss0_dp1 {
> > +	data-lanes = <0 1>;
> > +	status = "okay";
> > +
> > +	ports {
> > +		port@1 {
> > +			reg = <1>;
> This way you're redefining this node.. I suppose going with
> something like:
> 
> 8280:
> mdss0_dp1 {
> 	compatible
> 	blahblah
> 
> 	ports {
> 		[..]
> 
> 		port@1 {
> 		reg = <1>;
> 
> 			mdss0_dp1_out : endpoint {
> 			};
> 		};
> 	}
> }
> 
> crd:
> &mdss0_dp1_out {
> 	//btw data-lanes should be there and not in mdss_dp, I think
> 	remote-endpoint = <&pmic_glink_...>
> }
> 
> would be better, and that's what we're already doing for DSI..
> 

To summarize our private discussion about this; by aiming for not
repeating the structure from the dtsi we avoid a class of bugs caused by
typos between the two files. As such I agree that this is a good thing,
and have adjusted the structure accordingly in v4.

> I think I missed all this during the 8[34]50 review too..
> 
> With that addressed, for both crd and x13s (as the patch is essentially
> identical)
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> 

Thanks,
Bjorn

> Konrad
> 
> > +
> > +			mdss0_dp1_out: endpoint {
> > +				remote-endpoint = <&pmic_glink_con1_ss>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> >  &mdss0_dp3 {
> >  	compatible = "qcom,sc8280xp-edp";
> >  	/delete-property/ #sound-dai-cells;
> > @@ -480,7 +628,6 @@ &usb_0 {
> >  };
> >  
> >  &usb_0_dwc3 {
> > -	/* TODO: Define USB-C connector properly */
> >  	dr_mode = "host";
> >  };
> >  
> > @@ -499,12 +646,15 @@ &usb_0_qmpphy {
> >  	status = "okay";
> >  };
> >  
> > +&usb_0_role_switch {
> > +	remote-endpoint = <&pmic_glink_con0_hs>;
> > +};
> > +
> >  &usb_1 {
> >  	status = "okay";
> >  };
> >  
> >  &usb_1_dwc3 {
> > -	/* TODO: Define USB-C connector properly */
> >  	dr_mode = "host";
> >  };
> >  
> > @@ -523,6 +673,10 @@ &usb_1_qmpphy {
> >  	status = "okay";
> >  };
> >  
> > +&usb_1_role_switch {
> > +	remote-endpoint = <&pmic_glink_con1_hs>;
> > +};
> > +
> >  &xo_board_clk {
> >  	clock-frequency = <38400000>;
> >  };
> > @@ -709,4 +863,54 @@ reset-n-pins {
> >  			drive-strength = <16>;
> >  		};
> >  	};
> > +
> > +	usb0_sbu_default: usb0-sbu-state {
> > +		oe-n-pins {
> > +			pins = "gpio101";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strengh = <16>;
> > +			output-high;
> > +		};
> > +
> > +		sel-pins {
> > +			pins = "gpio164";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +		};
> > +
> > +		mode-pins {
> > +			pins = "gpio167";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +			output-high;
> > +		};
> > +	};
> > +
> > +	usb1_sbu_default: usb1-sbu-state {
> > +		oe-n-pins {
> > +			pins = "gpio48";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strengh = <16>;
> > +			output-high;
> > +		};
> > +
> > +		sel-pins {
> > +			pins = "gpio47";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +		};
> > +
> > +		mode-pins {
> > +			pins = "gpio50";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <16>;
> > +			output-high;
> > +		};
> > +	};
> >  };
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > index 92d5b5e21e50..7897d33f1416 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@...0000 {
> >  				iommus = <&apps_smmu 0x820 0x0>;
> >  				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
> >  				phy-names = "usb2-phy", "usb3-phy";
> > +
> > +				port {
> > +					usb_0_role_switch: endpoint {
> > +					};
> > +				};
> >  			};
> >  		};
> >  
> > @@ -3095,6 +3100,11 @@ usb_1_dwc3: usb@...0000 {
> >  				iommus = <&apps_smmu 0x860 0x0>;
> >  				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> >  				phy-names = "usb2-phy", "usb3-phy";
> > +
> > +				port {
> > +					usb_1_role_switch: endpoint {
> > +					};
> > +				};
> >  			};
> >  		};
> >  

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