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Message-ID: <63f41994-6408-1fe5-2d75-363dc6933eed@quicinc.com>
Date:   Tue, 14 Feb 2023 13:47:33 -0800
From:   Melody Olvera <quic_molvera@...cinc.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/3] arm64: dts: qcom: qdu1000: Add IPCC, MPSS, AOSS nodes



On 2/14/2023 1:47 AM, Krzysztof Kozlowski wrote:
> On 13/02/2023 20:01, Melody Olvera wrote:
>> Add nodes for IPCC, MPSS, and AOSS drivers. Also update
>> the scm node to include its interconnect.
>>
>> Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
>> ---
>
>>  
>> +		aoss_qmp: power-controller@...0000 {
>> +			compatible = "qcom,qdu1000-aoss-qmp", "qcom,aoss-qmp";
>> +			reg = <0x0 0xc300000 0x0 0x400>;
>> +			interrupts-extended = <&ipcc IPCC_CLIENT_AOP
>> +						     IPCC_MPROC_SIGNAL_GLINK_QMP
>> +						     IRQ_TYPE_EDGE_RISING>;
>> +			mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
>> +
>> +			#clock-cells = <0>;
>> +			#power-domain-cells = <1>;
> This does not look right. Which part of aoss-qmp registers power domains?

You're right; I didn't realize part of the driver that registered this had been removed. Will drop
that line.

Thanks,
Melody
>
> Best regards,
> Krzysztof
>

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