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Message-ID: <df464409-9a93-c057-5f66-923a9e24696a@linaro.org>
Date: Tue, 14 Feb 2023 10:52:58 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Binbin Zhou <zhoubinbin@...ngson.cn>,
Huacai Chen <chenhuacai@...nel.org>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Jianmin Lv <lvjianmin@...ngson.cn>,
Huacai Chen <chenhuacai@...ngson.cn>,
linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
loongarch@...ts.linux.dev, devicetree@...r.kernel.org,
loongson-kernel@...ts.loongnix.cn
Subject: Re: [PATCH V2 1/2] dt-bindings: interrupt-controller: Add Loongson
EIOINTC
On 13/02/2023 13:15, Binbin Zhou wrote:
> Add Loongson Extended I/O Interrupt controller binding with DT schema
> format using json-schema.
>
> Signed-off-by: Binbin Zhou <zhoubinbin@...ngson.cn>
> ---
> .../loongson,eiointc.yaml | 80 +++++++++++++++++++
> 1 file changed, 80 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
> new file mode 100644
> index 000000000000..88580297f955
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
Drop quotes from bopth.
> +
> +title: Loongson Extended I/O Interrupt Controller
> +
> +maintainers:
> + - Binbin Zhou <zhoubinbin@...ngson.cn>
> +
> +description: |
> + This interrupt controller is found on the Loongson-3 family chips and
> + Loongson-2K0500 chip and is used to distribute interrupts directly to
> + individual cores without forwarding them through the HT's interrupt line.
> +
> +allOf:
> + - $ref: /schemas/interrupt-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - loongson,eiointc-1.0
Why not using SoC based compatible? It is preferred.
> +
> + reg:
> + minItems: 1
> + maxItems: 3
You need to describe the items.
> +
> + interrupt-controller: true
> +
> + interrupts:
> + description:
> + Interrupt source of the CPU interrupts.
You need to describe the items.
> +
> + interrupt-names:
> + description:
> + List of names for the parent interrupts.
Drop description.
> + items:
> + - const: int0
> +
> + '#interrupt-cells':
> + const: 1
> +
> + 'loongson,eio-num-vecs':
Drop quotes.
> + description:
> + The number of devices supported by the extended I/O interrupt vector.
Why this cannot be inferred from the compatible? Different boards with
the same SoC support different devices?
> + $ref: "/schemas/types.yaml#/definitions/uint32"
Drop quotes.
> + minimum: 1
> + maximum: 256
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-controller
> + - '#interrupt-cells'
> + - 'loongson,eio-num-vecs'
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + eiointc: interrupt-controller@...11600 {
> + compatible = "loongson,eiointc-1.0";
> + reg = <0x1fe11600 0x8
> + 0x1fe11700 0x8
> + 0x1fe11800 0x8>;
That's not correct syntax. <>, <>, <>
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interrupt-parent = <&cpuintc>;
> + interrupts = <3>;
> + interrupt-names = "int0";
> +
> + loongson,eio-num-vecs = <128>;
> +
Drop stray blank line.
> + };
> +
> +...
Best regards,
Krzysztof
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