[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230214115553.10416-5-dipenp@nvidia.com>
Date: Tue, 14 Feb 2023 03:55:51 -0800
From: Dipen Patel <dipenp@...dia.com>
To: <thierry.reding@...il.com>, <jonathanh@...dia.com>,
<linux-kernel@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-gpio@...r.kernel.org>, <linus.walleij@...aro.org>,
<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
<robh+dt@...nel.org>, <timestamp@...ts.linux.dev>
CC: Dipen Patel <dipenp@...dia.com>
Subject: [PATCH V2 4/6] dt-bindings: timestamp: Add Tegra234 support
Added timestamp provider support for the Tegra234 in devicetree
bindings.
Signed-off-by: Dipen Patel <dipenp@...dia.com>
---
v2:
- Removed nvidia,slices property
- Added nvidia,gpio-controller based on review comments from Thierry,
this will help simplify the hte provider driver.
.../timestamp/nvidia,tegra194-hte.yaml | 30 ++++++++++++-------
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml
index c31e207d1652..d0f4ed75baee 100644
--- a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml
+++ b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Tegra194 on chip generic hardware timestamping engine (HTE)
+title: Tegra on chip generic hardware timestamping engine (HTE) provider
maintainers:
- Dipen Patel <dipenp@...dia.com>
@@ -23,6 +23,8 @@ properties:
enum:
- nvidia,tegra194-gte-aon
- nvidia,tegra194-gte-lic
+ - nvidia,tegra234-gte-aon
+ - nvidia,tegra234-gte-lic
reg:
maxItems: 1
@@ -38,14 +40,11 @@ properties:
minimum: 1
maximum: 256
- nvidia,slices:
- $ref: /schemas/types.yaml#/definitions/uint32
+ nvidia,gpio-controller:
+ $ref: /schemas/types.yaml#/definitions/phandle
description:
- HTE lines are arranged in 32 bit slice where each bit represents different
- line/signal that it can enable/configure for the timestamp. It is u32
- property and depends on the HTE instance in the chip. The value 3 is for
- GPIO GTE and 11 for IRQ GTE.
- enum: [3, 11]
+ The phandle to AON gpio controller instance. This is required to handle
+ namespace conversion between GPIO and GTE.
'#timestamp-cells':
description:
@@ -55,11 +54,21 @@ properties:
mentioned in the nvidia GPIO device tree binding document.
const: 1
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra194-gte-aon
+ - nvidia,tegra234-gte-aon
+then:
+ required:
+ - nvidia,gpio-controller
+
required:
- compatible
- reg
- interrupts
- - nvidia,slices
- "#timestamp-cells"
additionalProperties: false
@@ -71,7 +80,7 @@ examples:
reg = <0xc1e0000 0x10000>;
interrupts = <0 13 0x4>;
nvidia,int-threshold = <1>;
- nvidia,slices = <3>;
+ nvidia,gpio-controller = <&gpio_aon>;
#timestamp-cells = <1>;
};
@@ -81,7 +90,6 @@ examples:
reg = <0x3aa0000 0x10000>;
interrupts = <0 11 0x4>;
nvidia,int-threshold = <1>;
- nvidia,slices = <11>;
#timestamp-cells = <1>;
};
--
2.17.1
Powered by blists - more mailing lists