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Message-Id: <20230214140858.1133292-10-rick.wertenbroek@gmail.com>
Date: Tue, 14 Feb 2023 15:08:57 +0100
From: Rick Wertenbroek <rick.wertenbroek@...il.com>
To: alberto.dassatti@...g-vd.ch
Cc: xxm@...k-chips.com, rick.wertenbroek@...g-vd.ch,
Rick Wertenbroek <rick.wertenbroek@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Shawn Lin <shawn.lin@...k-chips.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Jani Nikula <jani.nikula@...el.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rodrigo Vivi <rodrigo.vivi@...el.com>,
Mikko Kovanen <mikko.kovanen@...amobile.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: [PATCH v2 9/9] PCI: rockchip: Add parameter check for RK3399 PCIe endpoint core set_msi()
The RK3399 PCIe endpoint core supports only a single PCIe physcial
function (function number 0), therefore return -EINVAL if set_msi() is
called with a function number greater than 0.
The PCIe standard only allows the multi message capability (MMC) value
to be up to 0x5 (32 messages), therefore return -EINVAL if set_msi() is
called with a MMC value of over 0x5.
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@...il.com>
---
drivers/pci/controller/pcie-rockchip-ep.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index b7865a94e..80634b690 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -294,6 +294,16 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn,
struct rockchip_pcie *rockchip = &ep->rockchip;
u32 flags;
+ if (fn) {
+ dev_err(&epc->dev, "This endpoint controller only supports a single physical function\n");
+ return -EINVAL;
+ }
+
+ if (mmc > 0x5) {
+ dev_err(&epc->dev, "Number of MSI IRQs cannot be more than 32\n");
+ return -EINVAL;
+ }
+
flags = rockchip_pcie_read(rockchip,
ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
--
2.25.1
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