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Message-Id: <20230215204637.2761073-12-sashal@kernel.org>
Date: Wed, 15 Feb 2023 15:46:34 -0500
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>,
Tony Luck <tony.luck@...el.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Sasha Levin <sashal@...nel.org>, x86@...nel.org,
tglx@...utronix.de, mingo@...hat.com, bp@...en8.de
Subject: [PATCH AUTOSEL 5.15 12/12] x86/cpu: Add Lunar Lake M
From: Kan Liang <kan.liang@...ux.intel.com>
[ Upstream commit f545e8831e70065e127f903fc7aca09aa50422c7 ]
Intel confirmed the existence of this CPU in Q4'2022
earnings presentation.
Add the CPU model number.
[ dhansen: Merging these as soon as possible makes it easier
on all the folks developing model-specific features. ]
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Tony Luck <tony.luck@...el.com>
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Link: https://lore.kernel.org/all/20230208172340.158548-1-tony.luck%40intel.com
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/x86/include/asm/intel-family.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 13922963431a0..b8e7ea9e71e20 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -113,6 +113,8 @@
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
+#define INTEL_FAM6_LUNARLAKE_M 0xBD
+
/* "Small Core" Processors (Atom/E-Core) */
#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
--
2.39.0
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