linux-kernel - Re: [PATCH v2 3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR

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Message-ID: <Y+1YCC7iKGfzhCCs@spud>
Date:   Wed, 15 Feb 2023 22:09:12 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Evan Green <evan@...osinc.com>
Cc:     Palmer Dabbelt <palmer@...osinc.com>, vineetg@...osinc.com,
        heiko@...ech.de, slewis@...osinc.com,
        Albert Ou <aou@...s.berkeley.edu>,
        Andrew Bresticker <abrestic@...osinc.com>,
        Celeste Liu <coelacanthus@...look.com>,
        Guo Ren <guoren@...nel.org>, Jonathan Corbet <corbet@....net>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        dram <dramforever@...e.com>, linux-doc@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 3/6] RISC-V: hwprobe: Add support for
 RISCV_HWPROBE_BASE_BEHAVIOR_IMA

On Mon, Feb 06, 2023 at 12:14:52PM -0800, Evan Green wrote:

> +		case RISCV_HWPROBE_KEY_IMA_EXT_0:
> +			{
> +				u64 val = 0;
> +
> +				if (has_fpu())
> +					val |= RISCV_HWPROBE_IMA_FD;

The indent caught my eye here for a sec so my attention was drawn back
here. Would you mind adding a line of whitespace between these checks?
Cheers,
Conor.

> +				if (elf_hwcap & RISCV_ISA_EXT_c)
> +					val |= RISCV_HWPROBE_IMA_C;
> +				ret = set_hwprobe(pairs, val);
> +			}
> +			break;
> +


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