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Message-ID: <CAJM55Z8CRT_H-by=Nj0Nu1iWug1wdPMZceiE+RMJvE+q4RzQ7w@mail.gmail.com>
Date: Wed, 15 Feb 2023 11:31:14 +0100
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: William Qiu <william.qiu@...rfivetech.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-mmc@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Jaehoon Chung <jh80.chung@...sung.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/3] riscv: dts: starfive: Add mmc node
On Fri, 3 Feb 2023 at 09:21, William Qiu <william.qiu@...rfivetech.com> wrote:
>
> This adds the mmc node for the StarFive JH7110 SoC.
> Set mmco node to emmc and set mmc1 node to sd.
>
> Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
> ---
> .../jh7110-starfive-visionfive-2.dtsi | 23 ++++++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 37 +++++++++++++++++++
> 2 files changed, 60 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index c60280b89c73..e1a0248e907f 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -42,6 +42,29 @@ &rtc_osc {
> clock-frequency = <32768>;
> };
>
> +&mmc0 {
> + max-frequency = <100000000>;
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + non-removable;
> + cap-mmc-hw-reset;
> + post-power-on-delay-ms = <200>;
> + status = "okay";
> +};
> +
> +&mmc1 {
> + max-frequency = <100000000>;
> + bus-width = <4>;
> + no-sdio;ru
> + no-mmc;
> + broken-cd;
> + cap-sd-highspeed;
> + post-power-on-delay-ms = <200>;
> + status = "okay";
> +};
Please add these so they're sorted alphabetically (but keep the clocks
at the top), so there's at least some sort of system.
> &gmac0_rmii_refin {
> clock-frequency = <50000000>;
> };
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 64d260ea1f29..ae1a664e7af5 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -370,6 +370,11 @@ syscrg: clock-controller@...20000 {
> #reset-cells = <1>;
> };
>
> + sysreg: syscon@...30000 {
> + compatible = "starfive,sysreg", "syscon";
> + reg = <0x0 0x13030000 0x0 0x1000>;
> + };
> +
> gpio: gpio@...40000 {
> compatible = "starfive,jh7110-sys-pinctrl";
> reg = <0x0 0x13040000 0x0 0x10000>;
> @@ -407,5 +412,37 @@ gpioa: gpio@...20000 {
> gpio-controller;
> #gpio-cells = <2>;
> };
> +
> + mmc0: mmc@...10000 {
> + compatible = "starfive,jh7110-mmc";
> + reg = <0x0 0x16010000 0x0 0x10000>;
> + clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>,
> + <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
> + clock-names = "biu","ciu";
> + resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>;
> + reset-names = "reset";
> + interrupts = <74>;
> + fifo-depth = <32>;
> + fifo-watermark-aligned;
> + data-addr = <0>;
> + starfive,sysreg = <&sysreg 0x14 0x1a 0x7c000000>;
This may need updating depending on whether you fix the driver or bindings.
> + status = "disabled";
> + };
> +
> + mmc1: mmc@...20000 {
> + compatible = "starfive,jh7110-mmc";
> + reg = <0x0 0x16020000 0x0 0x10000>;
> + clocks = <&syscrg JH7110_SYSCLK_SDIO1_AHB>,
> + <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
> + clock-names = "biu","ciu";
> + resets = <&syscrg JH7110_SYSRST_SDIO1_AHB>;
> + reset-names = "reset";
> + interrupts = <75>;
> + fifo-depth = <32>;
> + fifo-watermark-aligned;
> + data-addr = <0>;
> + starfive,sysreg = <&sysreg 0x9c 0x1 0x3e>;
> + status = "disabled";
> + };
> };
> };
> --
> 2.34.1
>
>
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