[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <12e891b0-52aa-c5b0-e048-0830b0065233@linaro.org>
Date: Thu, 16 Feb 2023 11:38:48 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
andersson@...nel.org
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, viresh.kumar@...aro.org
Subject: Re: [RESEND PATCH 08/12] arm64: dts: qcom: sm8150: Supply clock from
cpufreq node to CPUs
On 15.02.2023 08:03, Manivannan Sadhasivam wrote:
> Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
> to the CPU cores. But this relationship is not represented in DTS so far.
>
> So let's make cpufreq node as the clock provider and CPU nodes as the
> consumers. The clock index for each CPU node is based on the frequency
> domain index.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index fd20096cfc6e..693d023d2629 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -48,6 +48,7 @@ CPU0: cpu@0 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x0>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <488>;
> dynamic-power-coefficient = <232>;
> @@ -74,6 +75,7 @@ CPU1: cpu@100 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x100>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <488>;
> dynamic-power-coefficient = <232>;
> @@ -97,6 +99,7 @@ CPU2: cpu@200 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x200>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <488>;
> dynamic-power-coefficient = <232>;
> @@ -119,6 +122,7 @@ CPU3: cpu@300 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x300>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <488>;
> dynamic-power-coefficient = <232>;
> @@ -141,6 +145,7 @@ CPU4: cpu@400 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x400>;
> + clocks = <&cpufreq_hw 1>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <369>;
> @@ -163,6 +168,7 @@ CPU5: cpu@500 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x500>;
> + clocks = <&cpufreq_hw 1>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <369>;
> @@ -185,6 +191,7 @@ CPU6: cpu@600 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x600>;
> + clocks = <&cpufreq_hw 1>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <369>;
> @@ -207,6 +214,7 @@ CPU7: cpu@700 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x700>;
> + clocks = <&cpufreq_hw 2>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <421>;
> @@ -4273,6 +4281,7 @@ cpufreq_hw: cpufreq@...23000 {
> clock-names = "xo", "alternate";
>
> #freq-domain-cells = <1>;
> + #clock-cells = <1>;
> };
>
> lmh_cluster1: lmh@...50800 {
Powered by blists - more mailing lists