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Message-ID: <af2cdad5-ee32-7956-cd77-2a18777a3857@schinagl.nl>
Date: Fri, 17 Feb 2023 20:27:05 +0100
From: Olliver Schinagl <oliver@...inagl.nl>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: Sander Vanheule <sander@...nheule.net>, linux-mips@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mips: Realtek RTL: select NO_EXCEPT_FILL
Hey Thomas,
On 17-02-2023 18:37, Thomas Bogendoerfer wrote:
> On Sun, Feb 05, 2023 at 07:33:46PM +0100, Olliver Schinagl wrote:
>>> I always thought that SWAP_IO_SPACE is needed for big endian, but
>>> looking at arch/mips/Kconfig I see a lot of SWAP_IO_SPACE for pure
>>> little endian machines. I need to dig deeper to understand why.
>> Thank you!
>
> and the reason why this works is simple, CONFIG_SWAP_IO_SPACE is a nop
> for little endian.
That makes life easy :p
>
>>> such a change would defeat the generic part of GENERIC_MIPS_KERNEL,
>>> because it will then only work on REALTEC_SOC and nothing else.
>> Ignoring the potential incorrect detail here, obviously I would prefer to
>> use the GENERIC_MIPS_KERNEL, but having to copy the whole config just to
>> leave out that one option also is kinda meh. So i'm hoping we can find a
>> solution of course :)
>
> what SOC is this exactly ?
It is the Realtek series of SoC, specifically in my case, the RTL9302b,
which doesn't have a PCI peripherial, at all :) Nor configured in the
devicetree, but of course generic_mips_kernel enables the drivers, which
should be noop. I don't see anything related to PCI during boot.
Having said that, the RTL930x series take their heritage from the
RTL819x (and probably older) wifi SoC series from realtek, which did
contain a PCIe peripherial, as that is where the (external) wifi chip
was connected too.
> Do you have a programmers manual for it,
> which contains details about the PCI bridge ?
If only. There are some (leaked) datasheets, that do contain the PCI
registers, mostly (obviously) the rtl819x datasheets.
https://github.com/libc0607/Realtek_switch_hacking/blob/files/REALTEK-RTL8196E.pdf
is one such example that contains the PCIe registers.
> Most of the PCI bridges
> used for MIPS contain a bit to select the endianess of the access
> to PCI spaces. If there is such a config just changing the current
> setting, should solve your problem.
I really want to solve this obviously, but without the PCI registers ...
It could be that those registers DO exist of course!
I'll double check tomorrow, where abouts booting fails, what driver is
the last to output anything to give a hint to where things are failing...
>
> If this isn't possible you could use something similair to the
> INGENIC approach, which could use a generic kernel but also an
> customized kernel. And in such a customized kernel it should be
> possible to remove SWAP_IO_SPACE.
Yeah, I just disabled that flag; I'll look into INGENIC in more detail,
but would hope we can do this in a clean way, because without the flag,
generic_mips_kernel works fine ...
Olliver
>
> Thomas.
>
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