[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <26baf35c-cc96-3911-95bc-c675123fcc49@linaro.org>
Date: Fri, 17 Feb 2023 23:19:56 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
linux-arm-msm@...r.kernel.org, andersson@...nel.org,
agross@...nel.org
Cc: marijn.suijten@...ainline.org, Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Akhil P Oommen <quic_akhilpo@...cinc.com>,
Chia-I Wu <olvaffe@...il.com>,
Douglas Anderson <dianders@...omium.org>,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 11/14] drm/msm/a6xx: Enable optional icc voting from
OPP tables
On 14/02/2023 19:31, Konrad Dybcio wrote:
> On GMU-equipped GPUs, the GMU requests appropriate bandwidth votes
> for us. This is however not the case for the other GPUs. Add the
> dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle
> bus voting as part of power level setting.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index d6b38bfdb3b4..b08ed127f8c4 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -2338,5 +2338,9 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
> msm_mmu_set_fault_handler(gpu->aspace->mmu, gpu,
> a6xx_fault_handler);
>
> + ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL);
> + if (ret)
> + return ERR_PTR(ret);
> +
> return gpu;
> }
--
With best wishes
Dmitry
Powered by blists - more mailing lists