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Message-ID: <272c1291-dfea-3dcb-9462-5f84c55f7637@linaro.org>
Date: Fri, 17 Feb 2023 15:24:46 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Herve Codina <herve.codina@...tlin.com>
Cc: Li Yang <leoyang.li@....com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Christophe Leroy <christophe.leroy@...roup.eu>,
Michael Ellerman <mpe@...erman.id.au>,
Nicholas Piggin <npiggin@...il.com>,
Qiang Zhao <qiang.zhao@....com>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Shengjiu Wang <shengjiu.wang@...il.com>,
Xiubo Li <Xiubo.Lee@...il.com>,
Fabio Estevam <festevam@...il.com>,
Nicolin Chen <nicoleotsuka@...il.com>,
linuxppc-dev@...ts.ozlabs.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, alsa-devel@...a-project.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v5 01/10] dt-bindings: soc: fsl: cpm_qe: Add TSA
controller
On 17/02/2023 14:50, Herve Codina wrote:
> Hi Krzysztof,
>
> On Fri, 17 Feb 2023 10:14:48 +0100
> Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> wrote:
>
>> On 16/02/2023 14:42, Herve Codina wrote:
>>> Add support for the time slot assigner (TSA)
>>> available in some PowerQUICC SoC such as MPC885
>>> or MPC866.
>>>
>>> Signed-off-by: Herve Codina <herve.codina@...tlin.com>
>>> ---
>>> .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml | 234 ++++++++++++++++++
>>> include/dt-bindings/soc/fsl,tsa.h | 13 +
>>> 2 files changed, 247 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
>>> create mode 100644 include/dt-bindings/soc/fsl,tsa.h
>
> [...]
>>> +
>>> +patternProperties:
>>> + '^tdm@[0-1]$':
>>> + description:
>>> + The TDM managed by this controller
>>> + type: object
>>> +
>>> + additionalProperties: false
>>> +
>>> + properties:
>>> + reg:
>>> + minimum: 0
>>> + maximum: 1
>>> + description:
>>> + The TDM number for this TDM, 0 for TDMa and 1 for TDMb
> [...]
>>> +
>>> + fsl,rx-frame-sync-delay-bits:
>>> + enum: [0, 1, 2, 3]
>>
>> maxItems: 1
>
> The property is an enum
> Why this maxItems value ?
Hm, it's an array, but you are right that enum forces dtschema to
interpret it as scalar value, so your code is correct.
>
> If I add the maxItems value, I've got some dt_binding_check errors:
> /xxxx/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml:
> patternProperties:^tdm@[0-1]$:properties:fsl,rx-frame-sync-delay-bits:
> 'enum' should not be valid under {'enum': ['const', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'minimum', 'maximum', 'multipleOf', 'pattern']}
> hint: Scalar and array keywords cannot be mixed
> from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
Best regards,
Krzysztof
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