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Message-Id: <20230217185225.43310-4-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Fri, 17 Feb 2023 18:52:24 +0000
From: Prabhakar <prabhakar.csengg@...il.com>
To: Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>
Cc: alsa-devel@...a-project.org, linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>From R01UH0914EJ0120 Rev.1.20 HW manual the interrupt numbers for SSI
channels have been updated,
SPI 329 - SSIF0 is now marked as reserved
SPI 333 - SSIF1 is now marked as reserved
SPI 335 - SSIF2 is now marked as reserved
SPI 336 - SSIF2 is now marked as reserved
SPI 341 - SSIF3 is now marked as reserved
This patch drops the above IRQs from SoC DTSI.
Fixes: 92a341315afc9 ("arm64: dts: renesas: r9a07g044: Add SSI support")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
---
Hi Geert,
As this is is a fixes patch and we are still waiting for [0] to be merged
shall do the same for V2L SoC?
[0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20230131223529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 68bd70210d08..9945dcf38031 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -184,9 +184,8 @@ ssi0: ssi@...49c00 {
reg = <0 0x10049c00 0 0x400>;
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI0_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI0_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
@@ -205,9 +204,8 @@ ssi1: ssi@...4a000 {
reg = <0 0x1004a000 0 0x400>;
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI1_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI1_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
@@ -225,10 +223,8 @@ ssi2: ssi@...4a400 {
"renesas,rz-ssi";
reg = <0 0x1004a400 0 0x400>;
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 335 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 336 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ interrupt-names = "int_req", "dma_rt";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI2_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI2_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
@@ -247,9 +243,8 @@ ssi3: ssi@...4a800 {
reg = <0 0x1004a800 0 0x400>;
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 339 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 341 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI3_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI3_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
--
2.25.1
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