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Message-ID: <01ee3dc6-a868-fd2b-93aa-11e6bdfcc9df@loongson.cn>
Date: Mon, 20 Feb 2023 13:44:51 +0800
From: zhuyinbo <zhuyinbo@...ngson.cn>
To: Stephen Boyd <sboyd@...nel.org>,
Huacai Chen <chenhuacai@...nel.org>,
Jianmin Lv <lvjianmin@...ngson.cn>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
WANG Xuerui <kernel@...0n.name>,
Yang Li <yang.lee@...ux.alibaba.com>,
devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, liupeibao@...ngson.cn,
loongarch@...ts.linux.dev, wanghongliang@...ngson.cn
Subject: Re: [PATCH v10 2/4] clk: clk-loongson2: add clock controller driver
support
在 2023/2/18 上午6:15, Stephen Boyd 写道:
> Quoting zhuyinbo (2023-02-14 23:35:22)
>> 在 2023/2/11 上午7:42, Stephen Boyd 写道:
>>> Quoting Yinbo Zhu (2022-11-28 19:41:55)
>>>
>>>> +
>>>> + mult = (val >> LOONGSON2_USB_FREQSCALE_SHIFT) &
>>>> + clk_div_mask(LOONGSON2_USB_FREQSCALE_WIDTH);
>>>> +
>>>> + rate = parent_rate * (mult + 1);
>>>> + do_div(rate, 8);
>>> Why is do_div() being used?
>> no expecial reason, I only want to get a result that rate divide 8.
> Ok, you can use div_u64() here and simplify.
okay, I got it.
>
>> you meaning is to use clk_parent_data to rework
>> loongson2_clk_pll_register and drop
>>
>> loongson2_obtain_fixed_clk_hw ?
> Yes
>
>>>> +}
>>>> +
>>>> +static void __init loongson2_clocks_init(struct device_node *np)
>>>> +{
>>>> + struct clk_hw **hws;
>>>> + struct clk_hw_onecell_data *clk_hw_data;
>>>> + spinlock_t loongson2_clk_lock;
>>>> +
>>>> + loongson2_pll_base = of_iomap(np, 0);
>>>> +
>>>> + if (!loongson2_pll_base) {
>>>> + pr_err("clk: unable to map loongson2 clk registers\n");
>>>> + goto err;
>>> return?
>> sorry, I don't get it. you meaning is that remove "goto err". Instead,
>> add a "return".
> Yes.
>
>>>> + }
>>>> +
>>>> + clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, LOONGSON2_CLK_END),
>>>> + GFP_KERNEL);
>>>> + if (WARN_ON(!clk_hw_data))
>>>> + goto err;
> [...]
>>>> +
>>>> +err:
>>>> + iounmap(loongson2_pll_base);
>>>> +}
>>>> +
>>>> +CLK_OF_DECLARE(loongson2_clk, "loongson,ls2k-clk", loongson2_clocks_init);
>>> Any reason this can't be a platform driver?
Your question is that why I don't use the platform_driver_register to
register clk and use CLK_OF_DECLARE ?
I was consider other clock controllers of Loongson-2 series may be
different with 2k1000 and I can add a line
CLK_OF_DECLARE() for compatible other platform in the future. eg.
CLK_OF_DECLARE(loongson2_clk, "loongson,ls2k-clk", loongson2_clocks_init);
+ CLK_OF_DECLARE(xxx1, xxx2, xxx3); // for other clock controllers of
Loongson-2 series
>> For the compatible consideration of other clock controllers of
>> Loongson-2 series in the future, the way of using dts can be
>>
>> better compatible.
>>
> Sorry that sentence doesn't make sense to me. The use of dts doesn't
> require the use of CLK_OF_DECLARE.
yes, the use of dts doesn't require the use of CLK_OF_DECLARE and can
use platform_driver_register
but my drvier not use platform_driver_register to register clk and use
CLK_OF_DECLARE to match of_clk_init.
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