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Message-ID: <CABPqkBTU_gnTr9ayvg220T4pO5NAguvu_UJAkZO2RUATWuMJ3A@mail.gmail.com>
Date: Mon, 20 Feb 2023 13:29:01 -0800
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Wyes Karny <wyes.karny@....com>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, hpa@...or.com,
x86@...nel.org, linux-perf-users@...r.kernel.org,
linux-kernel@...r.kernel.org, gautham.shenoy@....com,
ananth.narayan@....com
Subject: Re: [PATCH] perf/x86/rapl: Enable Core RAPL for AMD
On Mon, Feb 20, 2023 at 3:45 AM Peter Zijlstra <peterz@...radead.org> wrote:
>
> On Fri, Feb 17, 2023 at 04:13:54PM +0000, Wyes Karny wrote:
> > AMD processors support per-package and per-core energy monitoring
> > through RAPL counters which can be accessed by users running in
> > supervisor mode.
> >
> > Core RAPL counters gives power consumption information per core. For
> > AMD processors the package level RAPL counter are already exposed to
> > perf. Expose the core level RAPL counters also.
> >
> > sudo perf stat -a --per-core -C 0-127 -e power/energy-cores/
> >
> > Output:
> > S0-D0-C0 2 8.73 Joules power/energy-cores/
> > S0-D0-C1 2 8.73 Joules power/energy-cores/
> > S0-D0-C2 2 8.73 Joules power/energy-cores/
> > S0-D0-C3 2 8.73 Joules power/energy-cores/
> > S0-D0-C4 2 8.73 Joules power/energy-cores/
> >
> > Signed-off-by: Wyes Karny <wyes.karny@....com>
> > ---
> > arch/x86/events/rapl.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
> > index 52e6e7ed4f78..d301bbbc3b93 100644
> > --- a/arch/x86/events/rapl.c
> > +++ b/arch/x86/events/rapl.c
> > @@ -537,7 +537,7 @@ static struct perf_msr intel_rapl_spr_msrs[] = {
> > * - want to use same event codes across both architectures
> > */
> > static struct perf_msr amd_rapl_msrs[] = {
> > - [PERF_RAPL_PP0] = { 0, &rapl_events_cores_group, 0, false, 0 },
> > + [PERF_RAPL_PP0] = { MSR_AMD_CORE_ENERGY_STATUS, &rapl_events_cores_group, test_msr, false, RAPL_MSR_MASK },
>
> Stephane, this was an oversight?
>
I think it may depend on the CPU model. I remember it returning either
0 or bogus values on my systems. They may have improved that.
The commit msg does not show which CPU model this is run on.
>
> > [PERF_RAPL_PKG] = { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr, false, RAPL_MSR_MASK },
> > [PERF_RAPL_RAM] = { 0, &rapl_events_ram_group, 0, false, 0 },
> > [PERF_RAPL_PP1] = { 0, &rapl_events_gpu_group, 0, false, 0 },
> > @@ -764,7 +764,8 @@ static struct rapl_model model_spr = {
> > };
> >
> > static struct rapl_model model_amd_hygon = {
> > - .events = BIT(PERF_RAPL_PKG),
> > + .events = BIT(PERF_RAPL_PP0) |
> > + BIT(PERF_RAPL_PKG),
> > .msr_power_unit = MSR_AMD_RAPL_POWER_UNIT,
> > .rapl_msrs = amd_rapl_msrs,
> > };
> > --
> > 2.34.1
> >
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