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Message-ID: <8df07281-e332-e25d-e0d7-035efbe3925b@collabora.com>
Date: Mon, 20 Feb 2023 10:14:34 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: Project_Global_Chrome_Upstream_Group@...iatek.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
NĂcolas F . R . A . Prado
<nfraprado@...labora.com>
Subject: Re: [PATCH] arm64: dts: mediatek: Add cpufreq nodes for MT8192
Il 20/02/23 03:19, Allen-KH Cheng ha scritto:
> Add the cpufreq nodes for MT8192 SoC.
>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
> ---
> Fix a address warning on dtbs_check
> https://patchwork.kernel.org/project/linux-mediatek/patch/1609223471-24325-1-git-send-email-andrew-sh.cheng@mediatek.com/
> [Allen-KH Cheng <allen-kh.cheng@...iatek.com>]
> ---
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 424fc89cc6f7..181ec2db7a69 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -55,6 +55,7 @@ cpu0: cpu@0 {
> clock-frequency = <1701000000>;
> cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>;
> next-level-cache = <&l2_0>;
> + performance-domains = <&performance 1>;
There's a mistake here: this should be <&performance 0>;
> capacity-dmips-mhz = <530>;
> };
>
> @@ -66,6 +67,7 @@ cpu1: cpu@100 {
> clock-frequency = <1701000000>;
> cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>;
> next-level-cache = <&l2_0>;
> + performance-domains = <&performance 1>;
Same here
> capacity-dmips-mhz = <530>;
> };
>
> @@ -77,6 +79,7 @@ cpu2: cpu@200 {
> clock-frequency = <1701000000>;
> cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>;
> next-level-cache = <&l2_0>;
> + performance-domains = <&performance 1>;
and here
> capacity-dmips-mhz = <530>;
> };
>
> @@ -88,6 +91,7 @@ cpu3: cpu@300 {
> clock-frequency = <1701000000>;
> cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>;
> next-level-cache = <&l2_0>;
> + performance-domains = <&performance 1>;
....and here.
Regards,
Angelo
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