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Message-ID: <20230220161011.d3ad4dhuv5ocsa7s@orel>
Date: Mon, 20 Feb 2023 17:10:11 +0100
From: Andrew Jones <ajones@...tanamicro.com>
To: Sunil V L <sunilvl@...tanamicro.com>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Paul Walmsley <paul.walmsley@...ive.com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Len Brown <lenb@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Jonathan Corbet <corbet@....net>,
linux-riscv@...ts.infradead.org, linux-acpi@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
Conor Dooley <conor.dooley@...rochip.com>,
Anup Patel <apatel@...tanamicro.com>,
Atish Patra <atishp@...osinc.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>
Subject: Re: [PATCH V2 07/21] ACPI: processor_core: RISC-V: Enable mapping
processor to the hartid
On Thu, Feb 16, 2023 at 11:50:29PM +0530, Sunil V L wrote:
> processor_core needs arch-specific functions to map the ACPI ID
> to the physical ID. In RISC-V platforms, hartid is the physical id
> and RINTC structure in MADT provides this mapping. Add arch-specific
> function to get this mapping from RINTC.
>
> Signed-off-by: Sunil V L <sunilvl@...tanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> ---
> arch/riscv/include/asm/acpi.h | 3 +++
> drivers/acpi/processor_core.c | 29 +++++++++++++++++++++++++++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h
> index 7f9dce3c39d0..4a3622b38159 100644
> --- a/arch/riscv/include/asm/acpi.h
> +++ b/arch/riscv/include/asm/acpi.h
> @@ -15,6 +15,9 @@
> /* Basic configuration for ACPI */
> #ifdef CONFIG_ACPI
>
> +typedef u64 phys_cpuid_t;
> +#define PHYS_CPUID_INVALID INVALID_HARTID
> +
> /* ACPI table mapping after acpi_permanent_mmap is set */
> void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
> #define acpi_os_ioremap acpi_os_ioremap
> diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
> index 2ac48cda5b20..d6606a9f2da6 100644
> --- a/drivers/acpi/processor_core.c
> +++ b/drivers/acpi/processor_core.c
> @@ -106,6 +106,32 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry,
> return -EINVAL;
> }
>
> +/*
> + * Retrieve the RISC-V hartid for the processor
> + */
> +static int map_rintc_hartid(struct acpi_subtable_header *entry,
> + int device_declaration, u32 acpi_id,
> + phys_cpuid_t *hartid)
> +{
> + struct acpi_madt_rintc *rintc =
> + container_of(entry, struct acpi_madt_rintc, header);
> +
> + if (!(rintc->flags & ACPI_MADT_ENABLED))
> + return -ENODEV;
> +
> + /* device_declaration means Device object in DSDT, in the
> + * RISC-V, logical processors are required to
> + * have a Processor Device object in the DSDT, so we should
> + * check device_declaration here
> + */
> + if (device_declaration && rintc->uid == acpi_id) {
> + *hartid = rintc->hart_id;
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt,
> int type, u32 acpi_id)
> {
> @@ -136,6 +162,9 @@ static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt,
> } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) {
> if (!map_gicc_mpidr(header, type, acpi_id, &phys_id))
> break;
> + } else if (header->type == ACPI_MADT_TYPE_RINTC) {
> + if (!map_rintc_hartid(header, type, acpi_id, &phys_id))
> + break;
> }
> entry += header->length;
> }
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
Thanks,
drew
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