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Message-ID: <Y/UbqiHQ2/aczPzg@kroah.com>
Date: Tue, 21 Feb 2023 20:29:46 +0100
From: Greg KH <gregkh@...uxfoundation.org>
To: KP Singh <kpsingh@...nel.org>
Cc: linux-kernel@...r.kernel.org, pjt@...gle.com, evn@...gle.com,
jpoimboe@...nel.org, tglx@...utronix.de, x86@...nel.org,
hpa@...or.com, peterz@...radead.org,
pawan.kumar.gupta@...ux.intel.com, kim.phillips@....com,
alexandre.chartre@...cle.com, daniel.sneddon@...ux.intel.com,
corbet@....net, bp@...e.de, linyujun809@...wei.com,
jmattson@...gle.com,
José Oliveira <joseloliveira11@...il.com>,
Rodrigo Branco <rodrigo@...nelhacking.com>,
Alexandra Sandulescu <aesa@...gle.com>, stable@...r.kernel.org
Subject: Re: [PATCH v2 1/2] x86/speculation: Allow enabling STIBP with legacy
IBRS
On Tue, Feb 21, 2023 at 07:49:07PM +0100, KP Singh wrote:
> Setting the IBRS bit implicitly enables STIBP to protect against
> cross-thread branch target injection. With enhanced IBRS, the bit it set
> once and is not cleared again. However, on CPUs with just legacy IBRS,
> IBRS bit set on user -> kernel and cleared on kernel -> user (a.k.a
> KERNEL_IBRS). Clearing this bit also disables the implicitly enabled
> STIBP, thus requiring some form of cross-thread protection in userspace.
>
> Enable STIBP, either opt-in via prctl or seccomp, or always on depending
> on the choice of mitigation selected via spectre_v2_user.
>
> Reported-by: José Oliveira <joseloliveira11@...il.com>
> Reported-by: Rodrigo Branco <rodrigo@...nelhacking.com>
> Reviewed-by: Alexandra Sandulescu <aesa@...gle.com>
> Fixes: 7c693f54c873 ("x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS")
> Cc: stable@...r.kernel.org
> Signed-off-by: KP Singh <kpsingh@...nel.org>
> ---
> arch/x86/kernel/cpu/bugs.c | 33 ++++++++++++++++++++++-----------
> 1 file changed, 22 insertions(+), 11 deletions(-)
Why isn't patch 2/2 for stable as well?
thanks,
greg k-h
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