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Message-ID: <ee0d0d971a3095d6a1e96ad4f1ba32d2@natalenko.name>
Date: Tue, 21 Feb 2023 09:25:08 +0100
From: Oleksandr Natalenko <oleksandr@...alenko.name>
To: David Woodhouse <dwmw2@...radead.org>
Cc: Kim Phillips <kim.phillips@....com>, tglx@...utronix.de,
Usama Arif <usama.arif@...edance.com>, arjan@...ux.intel.com,
mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
hpa@...or.com, x86@...nel.org, pbonzini@...hat.com,
paulmck@...nel.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, rcu@...r.kernel.org, mimoja@...oja.de,
hewenliang4@...wei.com, thomas.lendacky@....com, seanjc@...gle.com,
pmenzel@...gen.mpg.de, fam.zheng@...edance.com,
punit.agrawal@...edance.com, simon.evans@...edance.com,
liangma@...ngbit.com,
"Limonciello, Mario" <Mario.Limonciello@....com>,
Piotr Gorski <piotrgorski@...hyos.org>
Subject: Re: [PATCH v9 0/8] Parallel CPU bringup for x86_64
On 21.02.2023 09:17, David Woodhouse wrote:
> On Tue, 2023-02-21 at 09:05 +0100, Oleksandr Natalenko wrote:
>>
>> Please see here: http://ix.io/4oLm
>
> Was that just for one CPU? Can we have them all please?
>
> The interesting part is the line starting 00000001. We're looking at
> the top 8 bits of EBX:
>
> Leaf Subleaf EAX EBX ECX EDX
> 00000000 00000000: 00000010 .... 68747541 Auth 444d4163 cAMD
> 69746e65 enti
> 00000001 00000000: 00a20f12 .... 00200800 .. . 7ef8320b .2.~
> 178bfbff ....
> ↑↑
>
> So the first CPU is CPU0. Could have told you that... what about the
> others? :)
Right, sorry. Here it is: http://ix.io/4oLq
> If anyone can reproduce this with a serial port, can you try this?
>
> From 98ad11d0fb88f081f49f7b1496420dbfbeff8833 Mon Sep 17 00:00:00 2001
> From: David Woodhouse <dwmw@...zon.co.uk>
> Date: Sat, 4 Feb 2023 15:20:24 +0000
> Subject: [PATCH] parallel debug
>
> ---
> arch/x86/kernel/head_64.S | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
> index 0e4e53d231db..da7f4d2d9951 100644
> --- a/arch/x86/kernel/head_64.S
> +++ b/arch/x86/kernel/head_64.S
> @@ -281,6 +281,15 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify,
> SYM_L_GLOBAL)
>
> .Lsetup_AP:
> /* EDX contains the APIC ID of the current CPU */
> +#if 1
> + /* Test hack: Print APIC ID and then CPU# when we find it. */
> + mov %edx, %ecx
> + mov %edx, %eax
> + addb $'A', %al
> + mov $0x3f8, %dx
> + outb %al, %dx
> + mov %ecx, %edx
> +#endif
> xorq %rcx, %rcx
> leaq cpuid_to_apicid(%rip), %rbx
>
> @@ -302,6 +311,14 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify,
> SYM_L_GLOBAL)
>
> .Linit_cpu_data:
> /* Get the per cpu offset for the given CPU# which is in ECX */
> +#if 1
> + mov %rcx, %rax
> + shr $3, %rax
> + addb $'a', %al
> +
> + mov $0x3f8, %dx
> + outb %al, %dx
> +#endif
> leaq __per_cpu_offset(%rip), %rbx
> movq (%rbx,%rcx,8), %rbx
> /* Save it for GS BASE setup */
--
Oleksandr Natalenko (post-factum)
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