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Message-ID: <Y/SIRmCE1KJdsRBT@hirez.programming.kicks-ass.net>
Date:   Tue, 21 Feb 2023 10:00:54 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     "Zhang, Rui" <rui.zhang@...el.com>,
        "Brown, Len" <len.brown@...el.com>,
        "zhang.jia@...ux.alibaba.com" <zhang.jia@...ux.alibaba.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH V2 0/1] x86: cpu topology fix and question on
 x86_max_cores

On Mon, Feb 20, 2023 at 11:49:45PM +0100, Thomas Gleixner wrote:

> > I thought of improving this by parsing all the valid APIC-IDs in MADT
> > during BSP bootup, and get such information by decoding the APIC-IDs
> > using the APIC-ID layout information retrieved from BSP. But this is
> > likely to be a fertile new source of bugs as Dave concerned.
> 
> The APIC-IDs are only usefull if there is an architected scheme how they
> are assigned. Is there such a thing?

Isn't that given through CPUID? Or are we worried each CPU will have
different values in the topology leafs?

We really should have added that CPUID uniformity sanity check a long
while ago :-(

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