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Date: Wed, 22 Feb 2023 13:19:18 +0800
From: Stanley Chu <chu.stanley@...il.com>
To: Po-Wen Kao <powen.kao@...iatek.com>
Cc: linux-scsi@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Alim Akhtar <alim.akhtar@...sung.com>,
Avri Altman <avri.altman@....com>,
Bart Van Assche <bvanassche@....org>,
"James E.J. Bottomley" <jejb@...ux.ibm.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Matthias Brugger <matthias.bgg@...il.com>,
wsd_upstream@...iatek.com, peter.wang@...iatek.com,
stanley.chu@...iatek.com, alice.chao@...iatek.com,
naomi.chu@...iatek.com, chun-hung.wu@...iatek.com,
cc.chou@...iatek.com, eddie.huang@...iatek.com,
mason.zhang@...iatek.com, chaotian.jing@...iatek.com,
jiajie.hao@...iatek.com
Subject: Re: [PATCH v2 6/7] scsi: ufs: core: Export symbols for MTK driver module
On Wed, Feb 22, 2023 at 11:05 AM Po-Wen Kao <powen.kao@...iatek.com> wrote:
>
> Export
> - ufshcd_mcq_config_mac
> - ufshcd_mcq_make_queues_operational
> - ufshcd_mcq_read_cqis
> - ufshcd_disable_intr
>
> Signed-off-by: Po-Wen Kao <powen.kao@...iatek.com>
> ---
> drivers/ufs/core/ufs-mcq.c | 3 +++
> drivers/ufs/core/ufshcd-priv.h | 2 --
> drivers/ufs/core/ufshcd.c | 3 ++-
> include/ufs/ufshcd.h | 6 ++++++
> 4 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
> index d1ff3ccd2085..ae67ab90bd29 100644
> --- a/drivers/ufs/core/ufs-mcq.c
> +++ b/drivers/ufs/core/ufs-mcq.c
> @@ -98,6 +98,7 @@ void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds)
> val |= FIELD_PREP(MCQ_CFG_MAC_MASK, max_active_cmds);
> ufshcd_writel(hba, val, REG_UFS_MCQ_CFG);
> }
> +EXPORT_SYMBOL_GPL(ufshcd_mcq_config_mac);
>
> /**
> * ufshcd_mcq_req_to_hwq - find the hardware queue on which the
> @@ -271,6 +272,7 @@ u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i)
> {
> return readl(mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS);
> }
> +EXPORT_SYMBOL_GPL(ufshcd_mcq_read_cqis);
>
> void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i)
> {
> @@ -401,6 +403,7 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
> MCQ_CFG_n(REG_SQATTR, i));
> }
> }
> +EXPORT_SYMBOL_GPL(ufshcd_mcq_make_queues_operational);
>
> void ufshcd_mcq_enable_esi(struct ufs_hba *hba)
> {
> diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
> index 13534a9a6d0a..1c83a6bc88b7 100644
> --- a/drivers/ufs/core/ufshcd-priv.h
> +++ b/drivers/ufs/core/ufshcd-priv.h
> @@ -75,8 +75,6 @@ int ufshcd_mcq_init(struct ufs_hba *hba);
> int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba);
> void ufshcd_mcq_print_hwqs(struct ufs_hba *hba, unsigned long bitmap);
> int ufshcd_mcq_memory_alloc(struct ufs_hba *hba);
> -void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba);
> -void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds);
> void ufshcd_mcq_select_mcq_mode(struct ufs_hba *hba);
> u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i);
> void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index 21e3bf5d8f08..a0848a8e2e6f 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -2567,7 +2567,7 @@ static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
> * @hba: per adapter instance
> * @intrs: interrupt bits
> */
> -static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
> +void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
> {
> u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
>
> @@ -2583,6 +2583,7 @@ static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
>
> ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
> }
> +EXPORT_SYMBOL_GPL(ufshcd_disable_intr);
>
> /**
> * ufshcd_prepare_req_desc_hdr - Fill UTP Transfer request descriptor header according to request
> diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
> index 8f79cca449e1..d4dc7bcec127 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -1230,6 +1230,7 @@ static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
>
> int ufshcd_alloc_host(struct device *, struct ufs_hba **);
> void ufshcd_dealloc_host(struct ufs_hba *);
> +void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs);
> int ufshcd_hba_enable(struct ufs_hba *hba);
> int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
> int ufshcd_link_recovery(struct ufs_hba *hba);
> @@ -1242,9 +1243,14 @@ void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
> void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
> void ufshcd_hba_stop(struct ufs_hba *hba);
> void ufshcd_schedule_eh_work(struct ufs_hba *hba);
> +
> +void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds);
> +u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i);
> void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
> +
Dummy empty line?
> unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
> struct ufs_hw_queue *hwq);
> +void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba);
> void ufshcd_mcq_enable_esi(struct ufs_hba *hba);
> void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg);
>
> --
> 2.18.0
>
Except for the above nickpicking, others look good to me.
Reviewed-by: Stanley Chu <stanley.chu@...iatek.com>
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