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Message-ID: <e7f5f9686a5d4872a2e530550228718f@AcuMS.aculab.com>
Date: Wed, 22 Feb 2023 09:01:05 +0000
From: David Laight <David.Laight@...LAB.COM>
To: 'Matthew Wilcox' <willy@...radead.org>,
Shakeel Butt <shakeelb@...gle.com>
CC: Roman Gushchin <roman.gushchin@...ux.dev>,
Yue Zhao <findns94@...il.com>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
"hannes@...xchg.org" <hannes@...xchg.org>,
"mhocko@...nel.org" <mhocko@...nel.org>,
"muchun.song@...ux.dev" <muchun.song@...ux.dev>,
"cgroups@...r.kernel.org" <cgroups@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] mm: change memcg->oom_group access with atomic operations
From: Matthew Wilcox
> Sent: 21 February 2023 13:51
...
> > For this particular case, documenting such an access. Though I don't
> > think there are any architectures which may tear a one byte read/write
> > and merging/refetching is not an issue for this.
>
> Wouldn't a compiler be within its rights to implement a one byte store as:
>
> load-word
> modify-byte-in-word
> store-word
>
> and if this is a lockless store to a word which has an adjacent byte also
> being modified by another CPU, one of those CPUs can lose its store?
> And WRITE_ONCE would prevent the compiler from implementing the store
> in that way.
Some alpha cpu couldn't do byte memory accesses - so always
did 32bit read-modify-write. But Linux doesn't support those
ones any more.
On arm 16bit structure members can be accessed with 32bit
instructions because the 16bit ones have a smaller offset.
On x86 the bit operations might access the (possibly misaligned)
32bit word containing the required bit - but they are locked.
ISTR a problem where gcc was using wider instructions and
doing a RMW on an adjacent volatile field.
I really can't remember the justification for not marking
fields that have unlocked accesses 'volatile' instead of
requiring all the accesses be done as explicit volatile ones.
David
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