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Message-ID: <Y/Y/48E/8lYFTo2D@matsya>
Date:   Wed, 22 Feb 2023 21:46:35 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Bjorn Helgaas <helgaas@...nel.org>
Cc:     Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Cai Huoqing <cai.huoqing@...ux.dev>,
        Robin Murphy <robin.murphy@....com>,
        Jingoo Han <jingoohan1@...il.com>, Frank Li <Frank.Li@....com>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        caihuoqing <caihuoqing@...du.com>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        linux-pci@...r.kernel.org, dmaengine@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Serge Semin <Sergey.Semin@...kalelectronics.ru>
Subject: Re: [PATCH v9 23/27] dmaengine: dw-edma: Add mem-mapped LL-entries
 support

On 21-02-23, 17:00, Bjorn Helgaas wrote:
> On Fri, Jan 13, 2023 at 08:14:05PM +0300, Serge Semin wrote:
> > Currently the DW eDMA driver only supports the linked lists memory
> > allocated locally with respect to the remote eDMA engine setup. It means
> > the linked lists will be accessible by the CPU via the MMIO space only. If
> > eDMA is embedded into the DW PCIe Root Ports or local End-points (which
> > support will be added in one of the following up commits) the linked lists
> > are supposed to be allocated in the CPU memory. In that case the
> > LL-entries can be directly accessed meanwhile the former case implies
> > using the MMIO-accessors for that.
> > 
> > In order to have both cases supported by the driver the dw_edma_region
> > descriptor should be fixed to contain the MMIO-backed and just
> > memory-based virtual addresses. The linked lists initialization procedure
> > will use one of them depending on the eDMA device nature. If the eDMA
> > engine is embedded into the local DW PCIe RP/EP controllers then the list
> > entries will be directly accessed by referencing the corresponding
> > structure fields.  Otherwise the MMIO accessors usage will be preserved.
> > 
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> 
> Hi Vinod, I just realized that I didn't solicit your ack for this
> patch and the following one (which I ended up splitting into two), and
> I hate to ask Linus to pull them without your OK.
> 
> Here are the current versions in the PCI tree:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?id=b47364a83054
>   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?id=157ce95927c1
>   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?id=536e6529e975
> 
> If you ack them, I will update them to reflect that.

Thanks for letting me know:

Acked-by: Vinod Koul <vkoul@...nel.org>

-- 
~Vinod

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