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Message-Id: <20230222172552.1545519-1-luca.ceresoli@bootlin.com>
Date: Wed, 22 Feb 2023 18:25:52 +0100
From: Luca Ceresoli <luca.ceresoli@...tlin.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Luca Ceresoli <luca.ceresoli@...tlin.com>,
Martyn Welch <martyn.welch@...labora.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Marek Vasut <marex@...x.de>,
Abel Vesa <abel.vesa@....com>, Jacky Bai <ping.bai@....com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Lucas Stach <l.stach@...gutronix.de>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: [PATCH] arm64: dts: imx8mp-msc-sm2s: Add sound card
The MSC SM2-MB-EP1 carrier board for the SM2S-IMX8PLUS SMARC module has an
NXPP SGTL5000 audio codec connected to I2S-0 (sai2).
This requires to:
* add the power supplies (always on)
* enable sai2 with pinmuxes
* reparent the CLKOUT1 clock that feeds the codec SYS_MCLK to
IMX8MP_CLK_24M in order it to generate an accurate 24 MHz rate
Signed-off-by: Luca Ceresoli <luca.ceresoli@...tlin.com>
---
.../dts/freescale/imx8mp-msc-sm2s-ep1.dts | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts
index 470ff8e31e32..894d9809f76d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts
@@ -14,6 +14,57 @@ / {
compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",
"avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",
"fsl,imx8mp";
+
+ reg_vcc_3v3_audio: 3v3_audio_regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3_AUD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_vcc_1v8_audio: 1v8_audio_regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8_AUD";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ sgtl5000-sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-sgtl5000";
+ audio-cpu = <&sai2>;
+ audio-codec = <&sgtl5000_codec>;
+ };
+};
+
+&i2c1 {
+ sgtl5000_codec: sgtl5000@a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+
+ assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>;
+ assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
+ assigned-clock-rates = <24000000>;
+ clocks = <&clk IMX8MP_CLK_CLKOUT1>;
+ clock-names = "mclk";
+
+ VDDA-supply = <®_vcc_3v3_audio>;
+ VDDD-supply = <®_vcc_1v8_audio>;
+ VDDIO-supply = <®_vcc_1v8_audio>;
+ };
+};
+
+/* I2S-0 = sai2 */
+&sai2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai2>;
+
+ assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <12288000>;
+
+ fsl,sai-mclk-direction-output;
+ status = "okay";
};
&flexcan1 {
@@ -49,4 +100,13 @@ pinctrl_smarc_gpio: smarcgpiosgrp {
<MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x19>, /* GPIO12 */
<MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19>; /* GPIO13 */
};
+
+ pinctrl_sai2: sai2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6
+ MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6
+ MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6
+ MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
+ >;
+ };
};
--
2.34.1
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