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Message-ID: <20230223065155.olemrm7cskwclzt7@orel>
Date: Thu, 23 Feb 2023 07:51:55 +0100
From: Andrew Jones <ajones@...tanamicro.com>
To: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
Cc: paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, leyfoon.tan@...rfivetech.com,
mason.huo@...rfivetech.com
Subject: Re: [PATCH v4 2/4] RISC-V: Factor out common code of
__cpu_resume_enter()
On Tue, Feb 21, 2023 at 10:35:21AM +0800, Sia Jee Heng wrote:
> The cpu_resume() function is very similar for the suspend to disk and
> suspend to ram cases. Factor out the common code into restore_csr macro
> and restore_reg macro.
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
> ---
> arch/riscv/include/asm/assembler.h | 62 ++++++++++++++++++++++++++++++
> arch/riscv/kernel/suspend_entry.S | 34 ++--------------
> 2 files changed, 65 insertions(+), 31 deletions(-)
> create mode 100644 arch/riscv/include/asm/assembler.h
>
> diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/assembler.h
> new file mode 100644
> index 000000000000..727a97735493
> --- /dev/null
> +++ b/arch/riscv/include/asm/assembler.h
> @@ -0,0 +1,62 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> + *
> + * Author: Jee Heng Sia <jeeheng.sia@...rfivetech.com>
> + */
> +
> +#ifndef __ASSEMBLY__
> +#error "Only include this from assembly code"
> +#endif
> +
> +#ifndef __ASM_ASSEMBLER_H
> +#define __ASM_ASSEMBLER_H
> +
> +#include <asm/asm.h>
> +#include <asm/asm-offsets.h>
> +#include <asm/csr.h>
> +
> +/*
> + * restore_csr - restore hart's CSR value
> + */
> + .macro restore_csr
Since there are more than one, 'restore_csrs' would be more appropriate
and s/CSR value/CSRs/
> + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
> + csrw CSR_EPC, t0
> + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
> + csrw CSR_STATUS, t0
> + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
> + csrw CSR_TVAL, t0
> + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
> + csrw CSR_CAUSE, t0
> + .endm
> +
> +/*
> + * restore_reg - Restore registers (except A0 and T0-T6)
> + */
> + .macro restore_reg
restore_regs
> + REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
> + REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
> + REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
> + REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
> + REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
> + REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
> + REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
> + REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
> + REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
> + REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
> + REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)
> + REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)
> + REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)
> + REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)
> + REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
> + REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
> + REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)
> + REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)
> + REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)
> + REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)
> + REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)
> + REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)
> + REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
> + .endm
> +
> +#endif /* __ASM_ASSEMBLER_H */
> diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S
> index aafcca58c19d..74a8fab8e0f6 100644
> --- a/arch/riscv/kernel/suspend_entry.S
> +++ b/arch/riscv/kernel/suspend_entry.S
> @@ -7,6 +7,7 @@
> #include <linux/linkage.h>
> #include <asm/asm.h>
> #include <asm/asm-offsets.h>
> +#include <asm/assembler.h>
> #include <asm/csr.h>
> #include <asm/xip_fixup.h>
>
> @@ -83,39 +84,10 @@ ENTRY(__cpu_resume_enter)
> add a0, a1, zero
>
> /* Restore CSRs */
> - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
> - csrw CSR_EPC, t0
> - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
> - csrw CSR_STATUS, t0
> - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
> - csrw CSR_TVAL, t0
> - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
> - csrw CSR_CAUSE, t0
> + restore_csr
>
> /* Restore registers (except A0 and T0-T6) */
> - REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
> - REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
> - REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
> - REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
> - REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
> - REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
> - REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
> - REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
> - REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
> - REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
> - REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)
> - REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)
> - REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)
> - REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)
> - REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
> - REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
> - REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)
> - REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)
> - REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)
> - REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)
> - REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)
> - REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)
> - REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
> + restore_reg
>
> /* Return zero value */
> add a0, zero, zero
> --
> 2.34.1
>
Otherwise,
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
Thanks,
drew
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