linux-kernel - Re: [PATCH v3 10/15] drm/msm/a6xx: Fix A680 highest bank bit value

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Message-ID: <b39f63ce-7f88-ba68-df46-de9470d63a4e@linaro.org>
Date:   Thu, 23 Feb 2023 15:51:32 +0100
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc:     Rob Clark <robdclark@...il.com>,
        Abhinav Kumar <quic_abhinavk@...cinc.com>,
        Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Akhil P Oommen <quic_akhilpo@...cinc.com>,
        linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Rob Clark <robdclark@...omium.org>
Subject: Re: [PATCH v3 10/15] drm/msm/a6xx: Fix A680 highest bank bit value



On 23.02.2023 15:48, Dmitry Baryshkov wrote:
> On Thu, 23 Feb 2023 at 15:49, Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>>
>>
>>
>> On 23.02.2023 14:06, Dmitry Baryshkov wrote:
>>> On Thu, 23 Feb 2023 at 14:07, Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>>>>
>>>> According to the vendor sources, it's equal to 16, which makes hbb_lo
>>>> equal to 3.
>>>
>>> I think we might be stricken with the ddr kind difference here, but I
>>> would not bet on it.
>> It totally is, but it also seems to be SoC-dependent..
>> I think all 8180x devices shipped with LPDDR4X FWIW
> 
> I think so too. However sdmshrike dts uses LPDDR5.
Yeah.. it may be better to skip this patch; it should be
possible to apply this series without this one.

Konrad
> 
>>
>> Konrad
>>>
>>>>
>>>> Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list")
>>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>>>> ---
>>>>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++-
>>>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>>> index b5017c56fa1b..2c4afecdd213 100644
>>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>>> @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
>>>>                 hbb_lo = 2;
>>>>         }
>>>>
>>>> -       if (adreno_is_a640_family(adreno_gpu)) {
>>>> +       if (adreno_is_a640(adreno_gpu)) {
>>>>                 amsbc = 1;
>>>>                 /* HBB = 15 */
>>>>                 hbb_lo = 2;
>>>>         }
>>>>
>>>> +       if (adreno_is_a680(adreno_gpu)) {
>>>> +               amsbc = 1;
>>>> +               /* HBB = 16 */
>>>> +               hbb_lo = 3;
>>>> +       }
>>>> +
>>>>         if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) {
>>>>                 amsbc = 1;
>>>>                 /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */
>>>>
>>>> --
>>>> 2.39.2
>>>>
>>>
>>>
> 
> 
>