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Message-ID: <372cbc16-c2da-b9b9-9ac2-f7a2572c426d@seco.com>
Date: Thu, 23 Feb 2023 12:13:06 -0500
From: Sean Anderson <sean.anderson@...o.com>
To: Andrew Lunn <andrew@...n.ch>,
Vladimir Oltean <vladimir.oltean@....com>
Cc: Maxime Chevallier <maxime.chevallier@...tlin.com>,
davem@...emloft.net, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com,
Jakub Kicinski <kuba@...nel.org>,
Eric Dumazet <edumazet@...gle.com>,
Paolo Abeni <pabeni@...hat.com>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
linux-arm-kernel@...ts.infradead.org,
Ioana Ciornei <ioana.ciornei@....com>
Subject: Re: [PATCH net-next] net: pcs: tse: port to pcs-lynx
On 2/10/23 15:02, Andrew Lunn wrote:
> On Fri, Feb 10, 2023 at 09:31:59PM +0200, Vladimir Oltean wrote:
>> On Fri, Feb 10, 2023 at 08:09:49PM +0100, Maxime Chevallier wrote:
>> > When submitting the initial driver for the Altera TSE PCS, Russell King
>> > noted that the register layout for the TSE PCS is very similar to the
>> > Lynx PCS. The main difference being that TSE PCS's register space is
>> > memory-mapped, whereas Lynx's is exposed over MDIO.
>> >
>> > Convert the TSE PCS to reuse the whole logic from Lynx, by allowing
>> > the creation of a dummy MDIO bus, and a dummy MDIO device located at
>> > address 0 on that bus. The MAC driver that uses this PCS must provide
>> > callbacks to read/write the MMIO.
>> >
>> > Also convert the Altera TSE MAC driver to this new way of using the TSE
>> > PCS.
>> >
>> > Signed-off-by: Maxime Chevallier <maxime.chevallier@...tlin.com>
>> > ---
>> > drivers/net/ethernet/altera/altera_tse.h | 2 +-
>> > drivers/net/ethernet/altera/altera_tse_main.c | 50 ++++-
>> > drivers/net/pcs/Kconfig | 4 +
>> > drivers/net/pcs/pcs-altera-tse.c | 194 +++++++-----------
>> > include/linux/pcs-altera-tse.h | 22 +-
>> > 5 files changed, 142 insertions(+), 130 deletions(-)
>>
>> The glue layer is larger than the duplicated PCS code? :(
>
> I was wondering if the glue could actually be made generic. The kernel
> has a number of reasonably generic MMIO device drivers, which are just
> given an address range and assume a logical mapping.
>
> Could this be made into a generic MDIO MMIO bus driver, which just
> gets configured with a base address, and maybe a stride between
> registers?
That's what I originally considered for MACB [1], but I ended up creating
the various encode/decode functions because the PCS didn't have an MDIO
counterpart [2].
--Sean
[1] https://lore.kernel.org/netdev/20211004191527.1610759-11-sean.anderson@seco.com/
This patch doesn't have a mmap-mdio, as I dropped it before submission.
[2] https://lore.kernel.org/netdev/20211004191527.1610759-8-sean.anderson@seco.com/
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