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Message-ID: <20230223180531.15148-2-enachman@marvell.com>
Date: Thu, 23 Feb 2023 20:05:25 +0200
From: Elad Nachman <enachman@...vell.com>
To: <thomas.petazzoni@...tlin.com>, <bhelgaas@...gle.com>,
<lpieralisi@...nel.org>, <robh@...nel.org>, <kw@...ux.com>,
<krzysztof.kozlowski+dt@...aro.org>, <linux-pci@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: Vadym Kochan <vadym.kochan@...ision.eu>
Subject: [PATCH v3 1/7] dt-bindings: PCI: armada8k: Add compatible string for AC5 SoC
From: Vadym Kochan <vadym.kochan@...ision.eu>
AC5 SoC has armada8k PCIe IP so add compatible string for it.
Signed-off-by: Vadym Kochan <vadym.kochan@...ision.eu>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
Documentation/devicetree/bindings/pci/pci-armada8k.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
index ff25a134befa..b272fa4f08b5 100644
--- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt
+++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
@@ -4,7 +4,9 @@ This PCIe host controller is based on the Synopsys DesignWare PCIe IP
and thus inherits all the common properties defined in snps,dw-pcie.yaml.
Required properties:
-- compatible: "marvell,armada8k-pcie"
+- compatible: Should be set to one of the following:
+ - "marvell,armada8k-pcie" : For A7K/8K family of SoCs
+ - "marvell,ac5-pcie" : For AC5 family of SoCs
- reg: must contain two register regions
- the control register region
- the config space region
--
2.17.1
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