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Message-ID: <0c3abe84-0cac-40c9-9e1b-8057ac510ed2@linaro.org>
Date: Thu, 23 Feb 2023 19:14:31 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Elad Nachman <enachman@...vell.com>, thomas.petazzoni@...tlin.com,
bhelgaas@...gle.com, lpieralisi@...nel.org, robh@...nel.org,
kw@...ux.com, krzysztof.kozlowski+dt@...aro.org,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 6/7] PCI: dwc: Introduce Configurable DMA mask
On 23/02/2023 19:05, Elad Nachman wrote:
> From: Elad Nachman <enachman@...vell.com>
>
> Some devices, such as AC5 and AC5X have their physical DDR memory
> start at address 0x2_0000_0000 . In order to have the DMA
There is no space before full stop and comma. Also fix wrapping.
> coherent allocation succeed later, a different DMA mask is
> required, as defined in the DT file for such SOCs.
> If not defined, fallback to 32-bit as previously done in the code.
> DT property is called num-dmamask , and can range between 33 and 64.
>
> Signed-off-by: Elad Nachman <enachman@...vell.com>
> ---
> .../pci/controller/dwc/pcie-designware-host.c | 23 ++++++++++++++-----
> 1 file changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9952057c8819..ac851b065325 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -204,7 +204,6 @@ static int dw_pcie_irq_domain_alloc(struct irq_domain *domain,
> pp->msi_irq_chip,
> pp, handle_edge_irq,
> NULL, NULL);
> -
How this is related to the commit?
> return 0;
> }
>
> @@ -250,7 +249,6 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp)
> irq_domain_remove(pp->irq_domain);
> return -ENOMEM;
> }
> -
Same problem... and later in the code as well.
Best regards,
Krzysztof
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