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Message-ID: <20230224195749.818282-3-sdalvi@google.com>
Date: Fri, 24 Feb 2023 13:57:47 -0600
From: Sajid Dalvi <sdalvi@...gle.com>
To: Jingoo Han <jingoohan1@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
"Krzysztof WilczyĆski" <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Sajid Dalvi <sdalvi@...gle.com>, kernel-team@...roid.com,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Andrew Chant <achant@...gle.com>
Subject: [PATCH v1 2/2] PCI: dwc: Skip waiting for link up on probe
When the Root Complex is probed, the default behavior is to spin in a loop
waiting for the link to come up. In some systems the link is not brought up
during probe, but later in the context of an end-point turning on.
Call trace:
dw_pcie_wait_for_link << spins in a loop for 1 second
dw_pcie_host_init
Adding the snps,skip-wait-link-up property in the pcie device tree node
will skip this loop and save 1 second per interface on pcie probe for
systems that do not need to bring up the link this early in the boot
sequence.
Signed-off-by: Sajid Dalvi <sdalvi@...gle.com>
Signed-off-by: Andrew Chant <achant@...gle.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 3ab6ae3712c4..f5cba44ebf39 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -477,8 +477,9 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
goto err_free_msi;
}
- /* Ignore errors, the link may come up later */
- dw_pcie_wait_for_link(pci);
+ if (!of_property_read_bool(np, "snps,skip-wait-link-up"))
+ /* Ignore errors, the link may come up later */
+ dw_pcie_wait_for_link(pci);
bridge->sysdata = pp;
--
2.39.2.637.g21b0678d19-goog
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