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Message-ID: <CACRpkdZe3cMMxJesD0mpqHTwvuWHjSGVHsiFUQQyuA+VWknMTQ@mail.gmail.com>
Date: Sat, 25 Feb 2023 01:01:46 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Herbert Xu <herbert@...dor.apana.org.au>
Cc: Lionel Debieve <lionel.debieve@...s.st.com>,
Li kunyu <kunyu@...china.com>, davem@...emloft.net,
linux-arm-kernel@...ts.infradead.org, linux-crypto@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com, mcoquelin.stm32@...il.com
Subject: Re: [v2 PATCH] crypto: stm32 - Save and restore between each request
Hi Herbert,
I tested this on the Ux500 and sadly this happens
already in probe():
[ 2.802539] stm32-hash a03c2000.hash: dma-maxburst not specified, using 0
[ 2.809342] stm32-hash a03c2000.hash: No IRQ, use polling mode
[ 2.815226] stm32-hash a03c2000.hash: DMA mode not available
[ 2.821140] stm32-hash a03c2000.hash: will run requests pump with
realtime priority
[ 2.828815] stm32-hash a03c2000.hash: Algo 0 : 0 failed
[ 2.834144] stm32-hash: probe of a03c2000.hash failed with error -22
I don't quite understand why, we never get to the tests...
On Fri, Feb 24, 2023 at 6:52 AM Herbert Xu <herbert@...dor.apana.org.au> wrote:
> v2 fixes potential state clobbering from the disconnect between
> hdev->flags and rctx->flags.
>
> ---8<---
> The Crypto API hashing paradigm requires the hardware state to
> be exported between *each* request because multiple unrelated
> hashes may be processed concurrently.
>
> The stm32 hardware is capable of producing the hardware hashing
> state but it was only doing it in the export function. This is
> not only broken for export as you can't export a kernel pointer
> and reimport it, but it also means that concurrent hashing was
> fundamentally broken.
>
> Fix this by moving the saving and restoring of hardware hash
> state between each and every hashing request.
>
> Fixes: 8a1012d3f2ab ("crypto: stm32 - Support for STM32 HASH module")
> Reported-by: Li kunyu <kunyu@...china.com>
> Signed-off-by: Herbert Xu <herbert@...dor.apana.org.au>
I think I understand the direction of the patch but it seems
the pm_runtime_* calls get unbalanced since now this is taken
in
stm32_hash_one_request
-> stm32_hash_hw_init()
-> pm_runtime_get_sync()
But no corresponding
pm_runtime_mark_last_busy(hdev->dev);
pm_runtime_put_autosuspend(hdev->dev);
Exist anymore? You know the semantics better than me,
I'm not sure where to put this, I guess where you save
the HW state in stm32_hash_update_cpu()?
I don't know about the DMA case then though.
Yours,
Linus Walleij
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