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Message-Id: <1677490575-29092-1-git-send-email-quic_krichai@quicinc.com>
Date: Mon, 27 Feb 2023 15:06:15 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: helgaas@...nel.org
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, mka@...omium.org,
quic_vbadigan@...cinc.com, quic_hemantk@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_ramkri@...cinc.com, manivannan.sadhasivam@...aro.org,
swboyd@...omium.org, dmitry.baryshkov@...aro.org,
svarbanov@...sol.com, agross@...nel.org, andersson@...nel.org,
konrad.dybcio@...ainline.org, lpieralisi@...nel.org,
robh@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
linux-phy@...ts.infradead.org, vkoul@...nel.org, kishon@...com,
mturquette@...libre.com, linux-clk@...r.kernel.org,
Krishna chaitanya chundru <quic_krichai@...cinc.com>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
Subject: [PATCH V1] arm64:dts:qcom:sc7280: mark memory of PCIe as cache coherent
Mark the PCIe node as dma-coherent as the devices on PCIe bus are
cache coherent.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index bdcb749..8f4ab6b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2131,6 +2131,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie1_clkreq_n>;
+ dma-coherent;
+
iommus = <&apps_smmu 0x1c80 0x1>;
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,
--
2.7.4
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