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Message-ID: <20230227105931.2812412-1-claudiu.beznea@microchip.com>
Date:   Mon, 27 Feb 2023 12:59:31 +0200
From:   Claudiu Beznea <claudiu.beznea@...rochip.com>
To:     <mturquette@...libre.com>, <sboyd@...nel.org>,
        <nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>
CC:     <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>,
        Dan Carpenter <error27@...il.com>
Subject: [PATCH] clk: at91: clk-sam9x60-pll: fix return value check

sam9x60_frac_pll_compute_mul_frac() can't return zero. Remove the check
against zero to reflect this.

Fixes: 43b1bb4a9b3e ("clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs")
Reported-by: Dan Carpenter <error27@...il.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
---
 drivers/clk/at91/clk-sam9x60-pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
index d757003004cb..0882ed01d5c2 100644
--- a/drivers/clk/at91/clk-sam9x60-pll.c
+++ b/drivers/clk/at91/clk-sam9x60-pll.c
@@ -668,7 +668,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
 
 		ret = sam9x60_frac_pll_compute_mul_frac(&frac->core, FCORE_MIN,
 							parent_rate, true);
-		if (ret <= 0) {
+		if (ret < 0) {
 			hw = ERR_PTR(ret);
 			goto free;
 		}
-- 
2.34.1

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