lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230227151847.207922-1-lucas.tanure@collabora.com>
Date:   Mon, 27 Feb 2023 15:18:46 +0000
From:   Lucas Tanure <lucas.tanure@...labora.com>
To:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Jonathan Corbet <corbet@....net>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Peter Geis <pgwipeout@...il.com>,
        Kever Yang <kever.yang@...k-chips.com>
Cc:     linux-rockchip@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-doc@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Lucas Tanure <lucas.tanure@...labora.com>, kernel@...labora.com
Subject: [RFC 0/1] ITS fails to allocate on rk3588

I am assisting with PCIe and networking bring-up for Rock Pi 5B (RK3588).
This chip uses the same GICv3 as RK356X but has fixed the previous
limitation of GIC only supporting 32-bit addresses.

But the implementation decision for shareability in GICR and GITS is
still the same.

I read the previous thread about this topic:
https://lore.kernel.org/lkml/2791594e-db60-e1d0-88e5-7e5bbd98ae4d@rock-chips.com/T/#m5dbc70ff308d81e98dd0d797e23d3fbf9c353245

>From my understanding, the errata numbers Marc Zyngier is referring to
are found in Arm errata documents at developer.arm.com/documentation.
But I could not find Cavium or Broadcom pages for errata with those
numbers in Documentation/arm64/silicon-errata.rst

I could not find an errata document about this shareability issue,
and by what Kever said in the previous thread this could be a
RockChip design decision.

Marc, as I could only find ARM errata numbers, is the errata number
you were expecting generated by ARM only, or RockChip should issue
a document like Arm to detail the issue?

Can this shareability issue be seen as a quirk without an
errata number?

The following patch is based on the work of Peter Geis for the
Quartz64 board and the previous thread feedback.

Lucas Tanure (1):
  irqchip/gic-v3: Add RK3588 GICR and GITS no share workaround

 Documentation/arm64/silicon-errata.rst |  4 +++
 arch/arm64/Kconfig                     | 13 ++++++++
 drivers/irqchip/irq-gic-v3-its.c       | 42 ++++++++++++++++++++++++++
 3 files changed, 59 insertions(+)

-- 
2.39.2

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ