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Message-ID: <20230228082021.GB4839@thinkpad>
Date: Tue, 28 Feb 2023 13:50:21 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Rob Herring <robh@...nel.org>
Cc: andersson@...nel.org, lpieralisi@...nel.org, kw@...ux.com,
krzysztof.kozlowski+dt@...aro.org, vkoul@...nel.org,
konrad.dybcio@...aro.org, bhelgaas@...gle.com, kishon@...nel.org,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties
On Mon, Feb 27, 2023 at 01:55:35PM -0600, Rob Herring wrote:
> On Fri, Feb 24, 2023 at 04:28:55PM +0530, Manivannan Sadhasivam wrote:
> > Most of the PCIe controllers require iommu support to function properly.
> > So let's add them to the binding.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > ---
> > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > index a3639920fcbb..f48d0792aa57 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > @@ -64,6 +64,11 @@ properties:
> >
> > dma-coherent: true
> >
> > + iommus:
> > + maxItems: 1
> > +
> > + iommu-map: true
> > +
>
> I think both properties together doesn't make sense unless the PCI host
> itself does DMA in addition to PCI bus devices doing DMA.
>
How? With "iommus", we specify the SMR mask along with the starting SID and with
iommu-map, the individual SID<->BDF mapping is specified. This has nothing to
do with host DMA capabilities.
Thanks,
Mani
> Rob
--
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