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Message-ID: <CAF6AEGuqHDDQS22qcp8sk+5bj16XFiBarCLvpX=qNc2r2euMUw@mail.gmail.com>
Date: Tue, 28 Feb 2023 07:44:55 -0800
From: Rob Clark <robdclark@...il.com>
To: Bagas Sanjaya <bagasdotme@...il.com>
Cc: dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
Daniel Vetter <daniel@...ll.ch>,
Christian König <ckoenig.leichtzumerken@...il.com>,
Michel Dänzer <michel@...nzer.net>,
Tvrtko Ursulin <tvrtko.ursulin@...el.com>,
Rodrigo Vivi <rodrigo.vivi@...el.com>,
Alex Deucher <alexander.deucher@....com>,
Pekka Paalanen <ppaalanen@...il.com>,
Simon Ser <contact@...rsion.fr>,
Luben Tuikov <luben.tuikov@....com>,
Rob Clark <robdclark@...omium.org>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Douglas Anderson <dianders@...omium.org>,
Gustavo Padovan <gustavo@...ovan.org>,
intel-gfx@...ts.freedesktop.org,
"moderated list:DMA BUFFER SHARING FRAMEWORK"
<linaro-mm-sig@...ts.linaro.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@...r.kernel.org>,
"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>,
"open list:DMA BUFFER SHARING FRAMEWORK"
<linux-media@...r.kernel.org>, Liu Shixin <liushixin2@...wei.com>,
Sean Paul <sean@...rly.run>,
Stephen Boyd <swboyd@...omium.org>,
Vinod Polimera <quic_vpolimer@...cinc.com>
Subject: Re: [PATCH v7 00/15] dma-fence: Deadline awareness
On Tue, Feb 28, 2023 at 4:43 AM Bagas Sanjaya <bagasdotme@...il.com> wrote:
>
> On Mon, Feb 27, 2023 at 11:35:06AM -0800, Rob Clark wrote:
> > From: Rob Clark <robdclark@...omium.org>
> >
> > This series adds a deadline hint to fences, so realtime deadlines
> > such as vblank can be communicated to the fence signaller for power/
> > frequency management decisions.
> >
> > This is partially inspired by a trick i915 does, but implemented
> > via dma-fence for a couple of reasons:
> >
> > 1) To continue to be able to use the atomic helpers
> > 2) To support cases where display and gpu are different drivers
> >
> > This iteration adds a dma-fence ioctl to set a deadline (both to
> > support igt-tests, and compositors which delay decisions about which
> > client buffer to display), and a sw_sync ioctl to read back the
> > deadline. IGT tests utilizing these can be found at:
> >
> > https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline
> >
> >
> > v1: https://patchwork.freedesktop.org/series/93035/
> > v2: Move filtering out of later deadlines to fence implementation
> > to avoid increasing the size of dma_fence
> > v3: Add support in fence-array and fence-chain; Add some uabi to
> > support igt tests and userspace compositors.
> > v4: Rebase, address various comments, and add syncobj deadline
> > support, and sync_file EPOLLPRI based on experience with perf/
> > freq issues with clvk compute workloads on i915 (anv)
> > v5: Clarify that this is a hint as opposed to a more hard deadline
> > guarantee, switch to using u64 ns values in UABI (still absolute
> > CLOCK_MONOTONIC values), drop syncobj related cap and driver
> > feature flag in favor of allowing count_handles==0 for probing
> > kernel support.
> > v6: Re-work vblank helper to calculate time of _start_ of vblank,
> > and work correctly if the last vblank event was more than a
> > frame ago. Add (mostly unrelated) drm/msm patch which also
> > uses the vblank helper. Use dma_fence_chain_contained(). More
> > verbose syncobj UABI comments. Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
> > v7: Fix kbuild complaints about vblank helper. Add more docs.
> >
>
> I want to apply this series for testing, but it can't be applied cleanly
> on current drm-misc tree. On what tree (and commit) is this series based
> on?
You can find my branch here:
https://gitlab.freedesktop.org/robclark/msm/-/commits/dma-fence/deadline
BR,
-R
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